MAX9176EUB+T Maxim Integrated, MAX9176EUB+T Datasheet - Page 10

• Manufacturer Part Number: MAX9176EUB+T
• Description: LVDS Interface IC 670MHz LVDS->LVDS & X->LVDS 2
• Manufacturer: Maxim Integrated

Specifications of MAX9176EUB+T

• Rohs: yes

670MHz LVDS-to-LVDS and
Anything-to-LVDS 2:1 Multiplexers
Bypass the V
ceramic 0.1µF and 0.001µF capacitors in parallel as
close to the device as possible, with the smaller valued
capacitor closest to V
Input and output trace characteristics affect the perfor-
mance of the MAX9176/MAX9177. Use controlled-
impedance differential traces (100
radiated noise and ensure that noise couples as com-
mon mode, route the differential input and output sig-
nals within a pair close together. Reduce skew by
matching the electrical length of the two signal paths
that make up the differential pair. Excessive skew can
result in a degradation of magnetic field cancellation.
Maintain a constant distance between the differential
traces to avoid discontinuities in differential impedance.
Minimize the number of vias to further prevent imped-
ance discontinuities.
Interconnect for LVDS typically has a controlled differ-
ential impedance of 100 . Use cables and connectors
that have matched differential impedance to minimize
impedance discontinuities.
Avoid the use of unbalanced cables such as ribbon or
simple coaxial cable. Balanced cables such as twisted
pair offer superior signal quality and tend to generate
less EMI due to magnetic field canceling effects.
Balanced cables pick up noise as common mode,
which is rejected by the LVDS receiver.
The MAX9176/MAX9177 require external input and out-
put termination resistors. For LVDS, connect an input
termination resistor across each differential input and at
the far end of the interconnect driven by the LVDS out-
put. Place the input termination resistor as close to the
receiver input as possible. Termination resistors should
match the differential impedance of the transmission
line. Use 1% surface-mount resistors.
The MAX9176/MAX9177 feature an integrated differen-
tial output resistor. This resistor reduces jitter by damp-
ing reflections produced by any mismatch between the
transmission line and termination resistor at the far end
of the interconnect.
Separate the differential and single-ended signals to
reduce crosstalk. A four-layer printed circuit board with
separate layers for power, ground, differential signals,
10
______________________________________________________________________________________
CC
Applications Information
pin with high-frequency surface-mount
CC
Power-Supply Bypassing
.
Cables and Connectors
Differential Traces
typical). To reduce
Board Layout
Termination
and single-ended logic signals is recommended.
Separate the differential signals from the logic signals
with power and ground planes for best results.
The IEC 61000-4-2 standard (Figure 10) specifies ESD
tolerance for electronic systems. The IEC61000-4-2
model specifies a 150pF capacitor that is discharged
into the device through a 330
MAX9177 differential inputs and outputs are rated for
IEC61000-4-2 level 4 ( 8kV Contact Discharge and
(HBM, Figure 9) specifies a 100pF capacitor that is dis-
charged into the device through a 1.5k resistor.
IEC 61000-4-2 level 4 discharges higher peak current
and more energy than the HBM due to the lower series
resistance and larger capacitor.
Figure 9. Human Body Test Model
Figure 10. IEC 61000_4-2 Contact Discharge Test Model
15kV Air-Gap Discharge). The Human Body Model
VOLTAGE
SOURCE
VOLTAGE
HIGH-
SOURCE
HIGH-
DC
DC
IEC 61000-4-2 Level 4 ESD Protection
CHARGE-CURRENT
CHARGE-CURRENT
LIMIT RESISTOR
LIMIT RESISTOR
50 TO 100
1M
R
R
C
100pF
C
150pF
C s
C s
STORAGE
CAPACITOR
STORAGE
CAPACITOR
1.5k
RESISTANCE
DISCHARGE
RESISTANCE
DISCHARGE
R
330
D
R
D
resistor. The MAX9176/
DEVICE
UNDER
DEVICE
UNDER
TEST
TEST