7201LA12J IDT, 7201LA12J Datasheet - Page 11
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7201LA12J
Manufacturer Part Number
7201LA12J
Description
FIFO
Manufacturer
IDT
Datasheet
1.7201LA80DB.pdf
(14 pages)
Specifications of 7201LA12J
Part # Aliases
IDT7201LA12J
TABLE 2 — RESET AND FIRST LOAD TRUTH TABLE
Depth Expansion/Compound Expansion Mode
NOTE:
1. XI is connected to XO of previous device. See Figure 14. RS = Reset Input, FL/RT = First Load/Retransmit, EF = Empty Flag Output, FF = Full Flag Output,
TABLE 1 — RESET AND RETRANSMIT
Single Device Configuration/Width Expansion Mode
NOTE:
1. Pointer will increment if flag is HIGH.
IDT7201L/7201LA/7202LA CMOS ASYNCHRONOUS FIFO
256 x 9, 512 x 9 and 1,024 x 9
Reset First Device
Reset All Other Devices
Read/Write
Reset
Retransmit
Read/Write
XI = Expansion Input, HF = Half-Full Flag Output
FULL
Mode
Mode
RS
W
D
Figure 14. Block Diagram of 768 x 9, 1,536 x 9, 3,072 x 9 FIFO Memory (Depth Expansion)
9
RS
RS
0
0
1
0
1
1
Inputs
Inputs
FL
RT
0
1
X
X
1
0
9
9
(1)
(1)
(1)
XI
9
XI
0
0
0
FF
FF
FF
Read Pointer
Location Zero
Location Zero
Location Zero
Location Zero
Increment
7201A/
7201A/
7201A/
7202A
7202A
7202A
7200/
7200/
7200/
Read Pointer
IDT
IDT
IDT
11
XO
XO
XO
XI
XI
XI
X
(1)
EF
EF
Internal Status
FL
FL
FL
Internal Status
EF
Write Pointer
Location Zero
Location Zero
Location Zero
Unchanged
Increment
Write Pointer
X
COMMERCIAL, INDUSTRIAL AND MILITARY
(1)
9
EF
EF
0
X
X
TEMPERATURE RANGES
0
0
X
Outputs
2678 drw16
Outputs
R
Q
EMPTY
V
CC
FF
1
X
X
FF
1
1
X
HF
1
X
X