72V02L15J IDT, 72V02L15J Datasheet
72V02L15J
Specifications of 72V02L15J
Related parts for 72V02L15J
72V02L15J Summary of contents
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... W CONTROL R CONTROL XI IDT and the IDT logo are trademarks of Integrated Device Technology, Inc COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES ©2012 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. 3.3 VOLT CMOS ASYNCHRONOUS FIFO 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9, ...
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... IDT72V01/72V02/72V03/72V04/72V05/72V06 3.3V ASYNCHRONOUS FIFO 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9, 8,192 x 9 and 16,384 x 9 PIN CONFIGURATION INDEX PLCC (J32-1, order code: J) ...
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... Industrial temperature range product for the 25ns speed grade is available as a standard device. All other speed grades are available by special order. 3. Pulse widths less than minimum value are not allowed. 4. Values guaranteed by design, not currently tested. 5. Only applies to read data flow-through mode. ...
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... The Full Flag (FF) will go LOW, inhibiting further write operation, when the write pointer is one location less than the read pointer, indicating that the device is full. If the read pointer is not moved after Reset (RS), the Full-Flag (FF) will go LOW after 512/1,024/2,048/4,096/8,192/16,384 writes to the IDT72V01/ 72V02/72V03/72V04/72V05/72V06. EMPTY FLAG (EF) The Empty Flag (EF) will go LOW, inhibiting further read operations, when the read pointer is equal to the write pointer, indicating that the device is empty ...
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... IDT72V01/72V02/72V03/72V04/72V05/72V06 3.3V ASYNCHRONOUS FIFO 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9, 8,192 x 9 and 16,384 HF, FF NOTES: 1. EF, FF, HF may change status during Reset, but flags will be valid and around the rising edge of RS ...
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... IDT72V01/72V02/72V03/72V04/72V05/72V06 3.3V ASYNCHRONOUS FIFO 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9, 8,192 x 9 and 16,384 x 9 LAST READ IGNORED READ REF DATA OUT VALID RT W,R HF, EF Figure 7. Minimum Timing for an Empty Flag Coincident Read Pulse Figure 8. Minimum Timing for a Full Flag Coincident Write Pulse ...
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... IDT72V01/72V02/72V03/72V04/72V05/72V06 3.3V ASYNCHRONOUS FIFO 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9, 8,192 x 9 and 16,384 WHF HALF-FULL OR LESS HF WRITE TO LAST PHYSICAL LOCATION XOL XIS WRITE TO FIRST PHYSICAL W LOCATION R MORE THAN HALF-FULL Figure 9. Half-Full Flag Timing READ FROM ...
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... WIDTH EXPANSION Word width may be increased simply by connecting the corresponding input control signals of multiple devices. Status flags (EF, FF and HF) can be detected from any one device. Figure 13 demonstrates an 18-bit word width by using two IDT72V01/72V02/72V03/72V04/72V05/72V06s. Any word width can be attained by adding additional IDT72V01/72V02/72V03/72V04/72V05/72V06s (Figure 13) ...
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... DATA (D) IN WRITE (W) FULL FLAG (FF) RESET (RS) Figure 13. Block Diagram of 512 x 18, 1,024 x 18, 2,048 x 18, 4,096 x 18, 8,192 x 18 and 16,384 x 18 FIFO Memory Used in Width Expansion Mode TABLE 1 — RESET AND RETRANSMIT Single Device Configuration/Width Expansion Mode Mode RS Reset 0 Retransmit ...
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... DEPTH EXPANSION BLOCK NOTES: 1. For depth expansion block see section on Depth Expansion and Figure 14. 2. For Flag detection see section on Width Expansion and Figure 13. Inputs Internal Status FL XI Read Pointer 0 (1) Location Zero 1 (1) Location Zero ...
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... IDT72V01/72V02/72V03/72V04/72V05/72V06 3.3V ASYNCHRONOUS FIFO 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9, 8,192 x 9 and 16,384 x 9 SYSTEM A DATA DATA OUT DATA IN DATA OUT IDT 72V01 EF 72V02 B IDT 72V03 HF FF 7201A 72V04 A B 72V05 72V06 0-8 B 0-8 Q ...
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... Plastic Leaded Chip Carrier (PLCC, J32-1) Commercial Only Access Time (t Com'l and Ind'l Speed in Nanoseconds Commercial Only Low Power 512 x 9 FIFO 1,024 x 9 FIFO 2,048 x 9 FIFO 4,096 x 9 FIFO 8,192 x 9 FIFO 16,384 x 9 FIFO 3033 drw 21 for Tech Support: 408-360-1753 email: FIFOhelp@idt.com ) A ...