93LC46BT-I/SN Microchip Technology, 93LC46BT-I/SN Datasheet - Page 10
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
93LC46BT-I/SN
Manufacturer Part Number
93LC46BT-I/SN
Description
IC EEPROM 1KBIT 2MHZ 8SOIC
Manufacturer
Microchip Technology
Specifications of 93LC46BT-I/SN
Memory Size
1K (64 x 16)
Package / Case
8-SOIC (3.9mm Width)
Operating Temperature
-40°C ~ 85°C
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Speed
2MHz
Interface
Microwire, 3-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Organization
64 K x 16
Interface Type
Microwire
Maximum Clock Frequency
2 MHz
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.5 V
Maximum Operating Current
2 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
2.5 V, 5.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
93LC46BT-I/SN
93LC46BT-I/SNTR
93LC46BT-I/SNTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
93LC46BT-I/SN
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
93LC46BT-I/SN 06+
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
93LC46BT-I/SNG
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
93AA46A/B/C, 93LC46A/B/C, 93C46A/B/C
2.8
The WRITE instruction is followed by 8 bits (if ORG is
low or A-version devices) or 16 bits (if ORG pin is high
or B-version devices) of data, which are written into the
specified address. For 93AA46A/B/C and 93LC46A/B/C
devices, after the last data bit is clocked into DI, the
falling edge of CS initiates the self-timed auto-erase and
programming cycle. For 93C46A/B/C devices, the self-
timed auto-erase and programming cycle is initiated by
the rising edge of CLK on the last data bit.
FIGURE 2-8:
FIGURE 2-9:
DS21749H-page 10
CLK
CLK
CS
DO
CS
DO
DI
DI
Write
1
1
High-Z
High-Z
WRITE TIMING FOR 93AA AND 93LC DEVICES
WRITE TIMING FOR 93C DEVICES
0
0
1
1
A
A
N
N
•••
•••
A0
A0
Dx
Dx
•••
•••
The DO pin indicates the Ready/
device if CS is brought high after a minimum of 250 ns
low (T
is still in progress. DO at logical ‘1’ indicates that the
register at the specified address has been written with
the data specified and the device is ready for another
instruction.
D0
D0
Note:
CSL
T
T
CSL
CSL
). DO at logical ‘0’ indicates that programming
T
After the Write cycle is complete, issuing a
Start bit and then taking CS low will clear
the Ready/
WC
T
WC
Busy
Busy
T
T
SV
SV
Busy
2010 Microchip Technology Inc.
Ready
Ready
status from DO.
Busy
High-Z
High-Z
status of the
T
T
CZ
CZ