GLS85LS1008P-S-I-FZJE-ND101 Greenliant, GLS85LS1008P-S-I-FZJE-ND101 Datasheet - Page 4
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GLS85LS1008P-S-I-FZJE-ND101
Manufacturer Part Number
GLS85LS1008P-S-I-FZJE-ND101
Description
Solid State Drives - SSD 8GB SATA NANDrive 3.3V Ind grade
Manufacturer
Greenliant
Datasheet
1.GLS85LS1032P-S-I-FZJE-ND101.pdf
(7 pages)
Table 3-1: Pin Assignments
Table 3-2: I/O Type
These specifications are subject to change without notice.
© 2013 Greenliant Systems
GLS85LS1002P / 1004P / 1008P
Industrial Grade
V DD12AS
V DD12AP
SCID OUT
WP#/PD#
V DD33N
Symbol
RESET#
VDD33A
SCICLK
SCID IN
XCLKO
V SSAP
V DD33
V DD12
I/O Type
XCLKI
V SST
V SSA
VSSX
DNU
RX+
RFU
Rext
V SS
TX+
RX-
TX-
NC
I2D
I2U
XO
O3
O1
XI
I3
T9, T10, U2, U3, U4, U5, U6, U7, U9, U10,
P10, R2, R3, R4, R8, R9, R10, T3, T4, T8,
B2, B3, B4, B5, B6, B7, B8, B9, B10, B11,
G10, H9, H10, J8, J9, J10, K8, K9, L8, L9,
V3, V4, V5, V6, V7, V9, W4, W5, W6, W7
AB8, AB9, AB10, AB11, AC2, AC3, AC4,
A2, A3, A4, A5, A6, A7, A8, A9, A10, B1,
L10, M9, M10, N8, N9, N10, P4, P8, P9,
F3, F4, F5, F6, F7, F8, F9, H5, H8, L4,
AB1, AB2, AB3, AB4, AB5, AB6, AB7,
Crystal Clock Output
AC5, AC6, AC7, AC8, AC9, AC10
Input with Pull-down
Crystal Clock Input
Input with Pull-up
E3, F2, F10, V2, V10, W3, W9
G4, G5, G6, G7, G8, G9, H4
Analog Output
Analog Input
Description
Output
E6, E7, E8, E9
J4, K4, L3, M3
SATA NANDrive™
H3, J3, K2
Ball No.
M4, N4
E4, E5
T2
K10
W8
M2
U8
M8
G2
G3
H2
V8
K3
P2
P3
N3
N2
J2
L2
4)
4)
Serial Communication Interface (SCI)
The command to configure the T2 pin in either PD# or WP# is prepared by the
vendor-unique command. Please ask your Greenliant contact for details on the
SMART command specification.
Analog PWR
Analog PWR
Analog PWR
Analog GND
Analog GND
Digital PWR
Digital PWR
Digital PWR
Digital GND
Ball Type
Host Side Interface
Power and Ground
GND
Miscellaneous
O
O
O
O
I
I
I
I
I
I
I
I
4
IO Type
I2U
I2D
I2U
I2U
O1
XO
O3
O3
XI
I3
I3
I3
Analog Differential Input (+)
Analog Differential Input (-)
Analog Differential Output (+)
Analog Differential Output(-)
SCI port data input
SCI port data output. No external pull-up or pull-down
resistor should connect to this signal.
SCI port clock
Reserved for Future Use
External Resistor, 1Kohms (1%) connected to GND
This input is the active low hardware reset from host.
The WP#/PD# can be used for either the Write Protect mode
or Power Down mode, but only one mode is active at any
time. The Write Protect or Power-down modes can be
selected through the host command. The Write Protect mode
is the factory default setting.
External clock source input for main clock; 25MHz crystal,
need external 20pf capacitor to ground
External clock source output for main clock;
25MHz crystal, need external 20pf capacitor to ground
No connect
Do Not Use. All these pins should not be connected.
Supply voltage 3.3V
Supply voltage 1.2V
Analog supply voltage 1.2V (200mA max. total for both 1.2V
analog power rails, VDD12AS and VDD12AP)
Digital ground
Analog ground
Connected to PCB ground plane for thermal dissipation. Not
connected to any internal signal.
Analog ground
Analog ground
Name and Functions
Fact Sheet 02.100
January 2013
01/18/2013
S71432-F