AMB0480A5RJ IDT, AMB0480A5RJ Datasheet

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AMB0480A5RJ

Manufacturer Part Number
AMB0480A5RJ
Description
Memory Controllers
Manufacturer
IDT
Datasheet

Specifications of AMB0480A5RJ

Part # Aliases
IDTAMB0480A5RJ

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AMB0480A5RJ
Manufacturer:
ANALOGIC
Quantity:
2 980
Company:
Part Number:
AMB0480A5RJ
Quantity:
156
FEATURES:
EXPANDED FEATURES:
• Wide range DDR Timing Control
• Superfine adjustment for DDR timing
• Wide range of DDR slew rate control
• Slew rate controllable independent of output impedance
• High speed SMBus in test mode
• IBIST IDT PRBS Generator
FDB MEMORY CHANNEL
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
IDTAMB0480
ADVANCED MEMORY BUFFER FOR FULLY BUFFERED DIMM
c
Advanced Memory Buffer for Fully buffered DIMMs
3.2 and 4 Gbit/s serial speeds (DDR2-533 and 667 DRAM)
Support for up to eight DIMMs per channel
Repeater Mode for extending FB-DIMM links
Northbound and Southbound single lane fail over and channel
error detection
Voltage and Timing margin high-speed I/O test capability
Fully Supports the FB-DIMM configuration register set
Test features supported include:
- Integrated thermal sensor and status indicator
- Supports MEMBIST, IBIST and Virtual Host mode
- Transparent mode and direct access mode for DRAM testing
Complies with JEDEC Architecture and Protocol Specification
Available in 655 ball FCBGA package
2006 Integrated Device Technology, Inc.
Controller
Memory
Host
10
14
ADVANCED MEMORY BUFFER
FOR FULLY BUFFERED DIMM
MODULES
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
AMB
IDT
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
1
AMB
IDT
DESCRIPTION:
generation memory architecture to meet the growing memory requirement of
servers and workstations. The IDT Advanced Memory Buffer (AMB) chip is the
essential building block located on each FB-DIMM. The IDT AMB receives
commands and data from the host controller to control and write/read data to/
from the DRAMs on the DIMM. Commands and write data are sent southbound
from the host controller to AMBs in a daisy chain fashion and interpreted by the
target AMB. Status and read data are sent northbound from AMBs to the host
controller also in a daisy chain fashion, passing through non-target AMBs. This
unique channel structure alleviates buffer loading issues common in registered
DIMM technology, enabling designers to use a large number of DIMMs within
a single system.
and Protocol Specification and supports DDR2-533 and DDR2-667 DRAM.
It also enables serial data transfer at 3.2 and 4.0Gbps. The IDTAMB0480
supports servers, workstations, storage devices and communication applications
that support the next generation FB-DIMM architecture.
The fully buffered dual in-line memory module (FB-DIMM) is the next
IDTAMB0480 complies with the latest JEDEC defined FB-DIMM Architecture
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
AMB
IDT
COMMERCIAL TEMPERATURE RANGE
IDTAMB0480
Up to 8 modules
APRIL 2006
PRODUCT
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
AMB
IDT
DSC - 7042/2
BRIEF

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AMB0480A5RJ Summary of contents

Page 1

... The fully buffered dual in-line memory module (FB-DIMM) is the next generation memory architecture to meet the growing memory requirement of servers and workstations. The IDT Advanced Memory Buffer (AMB) chip is the essential building block located on each FB-DIMM. The IDT AMB receives commands and data from the host controller to control and write/read data to/ from the DRAMs on the DIMM ...

Page 2

... IDTAMB0480 ADVANCED MEMORY BUFFER FOR FULLY BUFFERED DIMM FUNCTIONAL BLOCK DIAGRAM PS[9:0]/PS[9:0] 3 SA[2:0] SMBus SCL Controller SDA Thermal DDR Link Sensor Termination FBDRES FSM Core Control BFUNC and CSRs SB clock Reset RESET Control REF clock SCK Phase-locked SCK Loop Clock PLLTSTO ...

Page 3

... IDTAMB0480 ADVANCED MEMORY BUFFER FOR FULLY BUFFERED DIMM PIN CONFIGURATIONS DQS3 DQS2 DQ18 SS D DQ19 DQS2 DQ21 DQ17 DQ20 DQ23 SS DQS DQS DQ22 CLK2 CLK2 CLK0 L NC ...

Page 4

... IDTAMB0480 ADVANCED MEMORY BUFFER FOR FULLY BUFFERED DIMM TEST TEST DQS17 CB6 CB7 E CB5 CB4 V DD TEST G RFU RFU ...

Page 5

... IDTAMB0480 ADVANCED MEMORY BUFFER FOR FULLY BUFFERED DIMM 655 BALL BGA PACKAGE ATTRIBUTES COMMERCIAL TEMPERATURE RANGE ...

Page 6

... IDTAMB0480 ADVANCED MEMORY BUFFER FOR FULLY BUFFERED DIMM ADVANCED MEMORY BUFFER SIGNALS BY BALL NUMBER Ball No. Signal DQ26 A5 DQ12 DQS10 A8 DQ13 DQS1 A10 A11 DQ10 A12 V DD A13 TESTLO A14 V DD A15 V DD A16 V DD A17 TEST ...

Page 7

... IDTAMB0480 ADVANCED MEMORY BUFFER FOR FULLY BUFFERED DIMM ADVANCED MEMORY BUFFER SIGNALS BY BALL NUMBER (CONT.) Ball No. Signal G29 DQ40 H1 DQ22 DQ28 H7 DQ30 H10 N C H11 N C H12 V SS H13 V DD H14 V SS ...

Page 8

... IDTAMB0480 ADVANCED MEMORY BUFFER FOR FULLY BUFFERED DIMM ADVANCED MEMORY BUFFER SIGNALS BY BALL NUMBER (CONT.) Ball No. Signal P22 V SS P23 A4B P24 A1B P25 N C P26 N C P27 N C P28 V SS P29 CKE1B A8A ...

Page 9

... IDTAMB0480 ADVANCED MEMORY BUFFER FOR FULLY BUFFERED DIMM ADVANCED MEMORY BUFFER SIGNALS BY BALL NUMBER (CONT.) Ball No. Signal AA11 V SS AA12 V SS AA13 V SS AA14 V SS AA15 V SS AA16 V SS AA17 V SS AA18 V SS AA19 V SS AA20 V SS AA21 V SS AA22 V SS ...

Page 10

... IDTAMB0480 ADVANCED MEMORY BUFFER FOR FULLY BUFFERED DIMM PIN DESCRIPTION Signal Type Description Channel Interface PN[13:0] O Northbound Output Data: High speed serial signal. Read path from AMB toward host on primary side of the DIMM connector. PN[13:0] O Northbound Output Data Complement SN[13:0] I Northbound Input Data: High speed serial signal. Read path from the previous AMB toward this AMB on secondary side of the DIMM connector ...

Page 11

... IDTAMB0480 ADVANCED MEMORY BUFFER FOR FULLY BUFFERED DIMM PIN DESCRIPTION (CONT.) Signal Type Description Clocking SCK I AMB Clock: This is one of the two differential reference clock inputs to the Phase Locked Loop in the AMB core. Phase Locked Loops in the AMB will shift this to all frequencies required by the core, DDR channels, and FBD Channel. ...

Page 12

... IDTAMB0480 ADVANCED MEMORY BUFFER FOR FULLY BUFFERED DIMM ELECTRICAL, POWER, AND THERMAL ABSOLUTE MAXIMUM RATINGS Symbol Description V Supply voltage DRAM Interface DD V Voltage on any DDR2 interface (DDR2). IN (2) V pin relative to Vss (DDR2) OUT I Input Clamp Current INK (V < > ...

Page 13

... IDTAMB0480 ADVANCED MEMORY BUFFER FOR FULLY BUFFERED DIMM DDR BIAS PLL AND CHANNEL BIAS CCFBD NOTES: 1. Refer to JEDEC PC2-4200/5300/6400 DDR2 FULLY BUFFERED DIMM DESIGN SPECIFICATIONS, rev 2.0. 2. The resistor R must be 0Ω and the inductor L needs to be replaced with a 0Ω resistor. The resistor R 3 ...

Page 14

... IDTAMB0480 ADVANCED MEMORY BUFFER FOR FULLY BUFFERED DIMM MISCELLANEOUS BIAS HVM NOTES: 1. Refer to JEDEC PC2-4200/5300/6400 DDR2 FULLY BUFFERED DIMM DESIGN SPECIFICATIONS, rev 2.0. 2. Component values for the AMB0480 are summarized in the BIAS COMPONENT table. BIAS COMPONENTS - RECOMMENDED VALUES AMB0480 ...

Page 15

... Tape and Reel Commercial (0°C to +70°C) Ball Grid Array - RoHS Compliant (1) BGA - Green Ball Grid Array with heat spreader - RoHS Compliant (1) BGA with heat spreader- Green Device Revision Advanced Memory Buffer for Fully Buffered DIMM Modules for Tech Support: logichelp@idt.com ...

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