MAX9963BJCCQ+TD Maxim Integrated, MAX9963BJCCQ+TD Datasheet - Page 19
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MAX9963BJCCQ+TD
Manufacturer Part Number
MAX9963BJCCQ+TD
Description
Buffers & Line Drivers
Manufacturer
Maxim Integrated
Datasheet
1.MAX9963BJCCQTD.pdf
(25 pages)
Specifications of MAX9963BJCCQ+TD
Rohs
yes
Table 1. Slew Rate Logic
Table 2. Driver Logic
Figure 2. Simplified Driver Channel
DATA_
CONNECTIONS
DATA_
EXTERNAL
RCV_
X
X
X
1
0
SC1
INPUTS
SPEED
HIGH-
0
0
1
1
RCV_
REFERENCE
X
0
0
1
1
INPUTS
CPHV_
CPLV_
DHV_
DLV_
DTV_
SC0
0
1
0
1
TMSEL
______________________________________________________________________________________
INTERNAL
REGISTER
X
X
1
0
X
CONTROL
0
1
MODE
LLEAK
DRIVER SLEW RATE (%)
4
0
0
0
0
1
0
1
Low-leakage mode
DRIVER OUTPUT
High-impedance
100
75
50
25
Drive to DHV_
(high-z) mode
Drive to DLV_
Drive to DTV_
(term mode)
SLEW RATE
Quad, Low-Power, 500Mbps
BUFFER
The MAX9963/MAX9964 modal operation is pro-
grammed through a 3-wire, low-voltage CMOS-compat-
ible serial interface.
The driver input is a high-speed multiplexer that selects
one of three voltage inputs, DHV_, DLV_, or DTV_. This
switching is controlled by high-speed inputs DATA_
and RCV_, and mode control bit TMSEL. A slew rate
circuit controls the slew rate of the buffer input. One of
four possible slew rates can be selected (Table 1). The
slew rate of the internal multiplexer sets the 100% dri-
ver slew rate (see the Driver Large-Signal Response
graph in the Typical Operating Characteristics).
DUT_ can be toggled at high speed between the buffer
output and high-impedance mode, or it can be placed
in low-leakage mode (Figure 2, Table 2). In high-imped-
ance mode, the clamps are connected. This switching
is controlled by high-speed input RCV_ and mode con-
trol bits TMSEL and LLEAK. In high-impedance mode,
the bias current at DUT_ is less than 3µA, while the
node maintains its ability to track high-speed signals. In
ATE Driver/Comparator
CLAMPS
0
1
0
COMPARATORS
50Ω
Output Driver
DUT_
19