24LC64T-I/SN Microchip Technology, 24LC64T-I/SN Datasheet - Page 12

• Manufacturer Part Number: 24LC64T-I/SN
• Description: IC EEPROM 64KBIT 400KHZ 8SOIC
• Manufacturer: Microchip Technology

Specifications of 24LC64T-I/SN

• Memory Size: 64K (8K x 8)
• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Speed: 400kHz
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Memory Configuration: 8K X 8
• Ic Interface Type: I2C
• Clock Frequency: 400kHz
• Supply Voltage Range: 2.5V To 5.5V
• Memory Case Style: SOIC
• No. Of Pins: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 24LC64T-I/SN; 24LC64T-I/SNTR

24AA64/24LC64/24FC64
7.0
The descriptions of the pins are listed in Table 7-1.
TABLE 7-1:
7.1
The A0, A1 and A2 inputs are used by the 24XX64 for
multiple device operation. The levels on these inputs
are compared with the corresponding bits in the slave
address. The chip is selected if the compare is true.
Up to eight devices may be connected to the same bus
by using different Chip Select bit combinations. These
inputs must be connected to either V
In Most applications, the chip address inputs A0, A1
and A2 are hard-wired to logic ‘0’ or logic ‘1’. For
applications in which these pins are controlled by a
microcontroller or other programmable device, the chip
address pins must be driven to logic ‘0’ or logic ‘1’
before normal device operation can proceed.
7.2
SDA is a bidirectional pin used to transfer addresses
and data into and out of the device. Since it is an open-
drain terminal, the SDA bus requires a pull-up resistor
to V
For normal data transfer, SDA is allowed to change
only during SCL low. Changes during SCL high are
reserved for indicating the Start and Stop conditions.
DS21189L-page 12
Name
SDA
SCL
CC
V
V
WP
A0
A1
A2
SS
CC
(typical 10 kΩ for 100 kHz, 2 kΩ for 400 kHz).
PIN DESCRIPTIONS
A0, A1, A2 Chip Address Inputs
Serial Data (SDA)
PDIP
PIN FUNCTION TABLE
7
1
2
3
4
5
6
8
SOIC
1
2
3
4
5
6
7
8
CC
or V
TSSOP
1
2
3
4
5
6
7
8
SS
.
DFN
1
2
3
4
5
6
7
8
7.3
The SCL input is used to synchronize the data transfer
from and to the device.
7.4
This pin must be connected to either V
to V
write operations are inhibited but read operations are
not affected.
MSOP
SS
1
2
3
4
5
6
7
8
, write operations are enabled. If tied to V
Serial Clock (SCL)
Write-Protect (WP)
Chip Address Input
Chip Address Input
Chip Address Input
Ground
Serial Address/Data I/O
Serial Clock
Write-Protect Input
+1.7V to 5.5V Power Supply
© 2007 Microchip Technology Inc.
Description
SS
or V
CC
. If tied
CC
,