74VHC273N_Q Fairchild Semiconductor, 74VHC273N_Q Datasheet
74VHC273N_Q
Specifications of 74VHC273N_Q
Related parts for 74VHC273N_Q
74VHC273N_Q Summary of contents
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... MTC20 Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering number. Pb-Free package per JEDEC J-STD-020B. ©1994 Fairchild Semiconductor Corporation 74VHC273 Rev. 1.5 General Description = 5V The VHC273 is an advanced high speed CMOS Octal CC = 25° ...
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... Data Inputs Master Reset CP Clock Pulse Input Q –Q Data Outputs 0 7 ©1994 Fairchild Semiconductor Corporation 74VHC273 Rev. 1.5 Logic Symbols Function Table Operating Mode Reset (Clear) Load ‘1’ Load ‘0’ HIGH Voltage Level L = LOW Voltage Level X = Immaterial = LOW-to-HIGH Transition ...
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... Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. ©1994 Fairchild Semiconductor Corporation 74VHC273 Rev. 1.5 Figure 1. 3 www.fairchildsemi.com ...
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... Operating Temperature OPR Input Rise and Fall Time 3.3V ± 0. 5.0V ± 0. Note: 1. Unused inputs must be held HIGH or LOW. They may not float. ©1994 Fairchild Semiconductor Corporation 74VHC273 Rev. 1.5 Parameter (1) Parameter 4 Rating –0.5V to +7.0V –0.5V to +7.0V –0. 0.5V CC –20mA ±20mA ±25mA ± ...
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... Quiet Output Minimum OLV Dynamic V OL (2) V Minimum HIGH Level IHD Dynamic Input Voltage (2) V Maximum LOW Level ILD Dynamic Input Voltage Note: 2. Parameter guaranteed by design. ©1994 Fairchild Semiconductor Corporation 74VHC273 Rev. 1.5 (V) Conditions Min. 1.50 0 –50µ 1 ...
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... Minimum Pulse Width (CK (L) Minimum Pulse Width (MR Minimum Setup Time S t Minimum Hold Time H t Minimum Removal Time (MR) REC Note 3.3 ± 0.3V or 5.0 ± 0.5V CC ©1994 Fairchild Semiconductor Corporation 74VHC273 Rev. 1.5 V (V) Conditions CC = 15pF 3.3 ± 0 50pF 15pF 5.0 ± 0 50pF 15pF 3.3 ± ...
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... Tape and Reel Specification Tape Format for DQFN Package Designator Section BQ Leader (Start End) Trailer (Hub End) Tape Dimensions Dimensions are in millimeters unless otherwise noted. ©1994 Fairchild Semiconductor Corporation 74VHC273 Rev. 1.5 Tape Number Cavities 125 (typ.) Carrier 2500/3000 75 (typ.) Figure 2. 7 Cavity ...
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... Tape and Reel Specification Reel Dimensions for DQFN Dimensions are in inches (millimeters) unless otherwise noted. Tape Size A 12mm 13.0 (330) ©1994 Fairchild Semiconductor Corporation 74VHC273 Rev. 1.5 (Continued 0.059 0.512 0.795 (1.50) (13.00) (20.20) Figure 7.008 0.488 0.724 (178) (12.4) (18.4) www.fairchildsemi.com ...
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... Physical Dimensions Dimensions are in inches (millimeters) unless otherwise noted. Figure 4. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide ©1994 Fairchild Semiconductor Corporation 74VHC273 Rev. 1.5 Package Number M20B 9 www.fairchildsemi.com ...
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... Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 5. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide ©1994 Fairchild Semiconductor Corporation 74VHC273 Rev. 1.5 Package Number M20D 10 www.fairchildsemi.com ...
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... Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 6. 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 4.5mm ©1994 Fairchild Semiconductor Corporation 74VHC273 Rev. 1.5 Package Number MLP020B (Preliminary) 11 www.fairchildsemi.com ...
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... Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 7. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide ©1994 Fairchild Semiconductor Corporation 74VHC273 Rev. 1.5 Package Number MTC20 12 www.fairchildsemi.com ...
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... TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended exhaustive list of all such trademarks. ® ACEx Across the board. Around the world. ActiveArray Bottomless Build it Now CoolFET CROSSVOLT CTL™ Current Transfer Logic™ ...