74ACT175PC_Q Fairchild Semiconductor, 74ACT175PC_Q Datasheet - Page 2
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74ACT175PC_Q
Manufacturer Part Number
74ACT175PC_Q
Description
Flip Flops Qd D-Type Flip-Flop
Manufacturer
Fairchild Semiconductor
Datasheet
1.74ACT175PC_Q.pdf
(12 pages)
Specifications of 74ACT175PC_Q
Number Of Circuits
4
Logic Family
74ACT
Logic Type
D-Type Flip-Flop
Polarity
Inverting/Non-Inverting
Input Type
Single-Ended
Output Type
Differential
Propagation Delay Time
11 ns
High Level Output Current
- 24 mA
Low Level Output Current
24 mA
Supply Voltage - Max
5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Package / Case
PDIP-16
Minimum Operating Temperature
- 40 C
Number Of Input Lines
4
Number Of Output Lines
4
Supply Voltage - Min
4.5 V
©1988 Fairchild Semiconductor Corporation
74AC175, 74ACT175 Rev. 1.4
Logic Symbol
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to
estimate propagation delays.
IEEE/IEC
Figure 1.
2
Functional Description
The AC/ACT175 consists of four edge-triggered D-type
flip-flops with individual D inputs and Q and Q outputs.
The Clock and Master Reset are common. The four flip-
flops will store the state of their individual D inputs on the
LOW-to-HIGH clock (CP) transition, causing individual Q
and Q outputs to follow. A LOW input on the Master
Reset (MR) will force all Q outputs LOW and Q outputs
HIGH independent of Clock or Data inputs. The AC/
ACT175 is useful for general logic applications where a
common Master Reset and Clock are acceptable.
Truth Table
H = HIGH Voltage Level
L = LOW Voltage Level
t
t
n
n+1
Inputs @ t
= Bit Time before Clock Pulse
= Bit Time after Clock Pulse
D
H
L
n
n
, MR = H
Q
Outputs @ t
H
L
n
www.fairchildsemi.com
n+1
Q
H
L
n