74LVX125SJX_NL Fairchild Semiconductor, 74LVX125SJX_NL Datasheet
74LVX125SJX_NL
Specifications of 74LVX125SJX_NL
Related parts for 74LVX125SJX_NL
74LVX125SJX_NL Summary of contents
Page 1
... Inputs n OE Output Enable Inputs n O Outputs n ©1994 Fairchild Semiconductor Corporation 74LVX125 Rev. 1.4.0 General Description The LVX125 contains four independent non-inverting buffers with 3-STATE outputs. The inputs tolerate volt- ages allowing the interface of 5V systems to 3V systems. Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5 ...
Page 2
... Input Voltage I V Output Voltage O T Operating Temperature Input Rise and Fall Time Note: 1. Unused inputs must be held HIGH or LOW. They may not float. ©1994 Fairchild Semiconductor Corporation 74LVX125 Rev. 1.4.0 Parameter –0.5V I (1) Parameter 2 Rating –0.5V to +7.0V –20mA –0. –20mA +20mA – ...
Page 3
... Quiet Output Maximum Dynamic V OLP V Quiet Output Minimum Dynamic V OLV V Minimum HIGH Level Dynamic Input Voltage IHD V Maximum LOW Level Dynamic Input Voltage ILD Note: 2. Input t t 3ns r f ©1994 Fairchild Semiconductor Corporation 74LVX125 Rev. 1.4.0 V Conditions Min. Typ. Max. CC 2.0 3.0 3.6 2.0 3.0 3.6 2 ...
Page 4
... Input Capacitance IN C Power Dissipation Capacitance PD Note defined as the value of the internal equivalent capacitance which is calculated from the operating current PD consumption without load. Average operating current can be obtained by the eqation: I ©1994 Fairchild Semiconductor Corporation 74LVX125 Rev. 1.4.0 V (V) Conditions Min. CC 2.7 C 15pF L ...
Page 5
... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
Page 6
... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
Page 7
... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
Page 8
... TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended exhaustive list of all such trademarks. ® ACEx Build it Now™ CorePLUS™ CROSSVOLT™ CTL™ Current Transfer Logic™ ...