74ACTQ821SPC_Q Fairchild Semiconductor, 74ACTQ821SPC_Q Datasheet
74ACTQ821SPC_Q
Specifications of 74ACTQ821SPC_Q
Related parts for 74ACTQ821SPC_Q
74ACTQ821SPC_Q Summary of contents
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... ESD immunity Outputs source/sink 24 mA Package Description Connection Diagram Pin Descriptions Pin Names D – – are trademarks of Fairchild Semiconductor Corporation. DS010686 March 1990 Revised September 2000 Description Data Inputs Data Outputs Output Enable Input Clock Input www.fairchildsemi.com ...
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Functional Description The ACTQ821 consists of ten-bit D-type edge-triggered flip-flops. The buffered Clock (CP) and buffered Output Enable (OE) are common to all flip-flops. The flip-flops will store the state of their individual D inputs that meet the setup and ...
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Absolute Maximum Ratings Supply Voltage ( Input Diode Current ( 0. 0. Input Voltage ( Output Diode Current ( ...
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DC Electrical Characteristics Note 2: All outputs loaded; thresholds on input associated with output under test. Note 3: Maximum test duration 2.0 ms, one output loaded at a time. Note 4: DIP package. Note 5: Max number of outputs defined ...
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FACT Noise Characteristics The setup of a noise characteristics measurement is critical to the accuracy and repeatability of the tests. The following is a brief description of the setup used to measure the noise characteristics of FACT. Equipment: Hewlett Packard ...
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Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide www.fairchildsemi.com Package Number M24B 6 ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...