74VHC74SJ_Q Fairchild Semiconductor, 74VHC74SJ_Q Datasheet
74VHC74SJ_Q
Specifications of 74VHC74SJ_Q
Related parts for 74VHC74SJ_Q
74VHC74SJ_Q Summary of contents
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... N14A Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. ©1992 Fairchild Semiconductor Corporation 74VHC74 Rev. 1.3.0 General Description 25°C The VHC74 is an advanced high speed CMOS Dual ...
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... Clock Pulse Inputs 1 2 CLR , CLR Direct Clear Inputs Direct Preset Inputs Output ©1992 Fairchild Semiconductor Corporation 74VHC74 Rev. 1.3.0 Logic Symbol IEEE/IEC Truth Table Inputs Outputs CLR (1) ...
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... Operating Temperature OPR Input Rise and Fall Time 3.3V ± 0. 5.0V ± 0.5V CC Note: 2. Unused inputs must be held HIGH or LOW. They may not float. ©1992 Fairchild Semiconductor Corporation 74VHC74 Rev. 1.3.0 Parameter (2) Parameter 3 Rating –0.5V to +7.0V –0.5V to +7.0V –0. 0.5V CC –20mA ±20mA ±25mA ±50mA – ...
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... LOW Level Input 2.0 IL Voltage 3.0–5.5 V HIGH Level 2.0 OH Output Voltage 3.0 4.5 3.0 4.5 V LOW Level 2.0 OL Output Voltage 3.0 4.5 3.0 4.5 I Input Leakage 0–5.5 IN Current I Quiescent 5.5 CC Supply Current ©1992 Fairchild Semiconductor Corporation 74VHC74 Rev. 1.3.0 (V) Conditions Min. 1.50 0 –50µA 1 2.9 4.4 I –4mA 2. –8mA 3. 50µA IN ...
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... Minimum Pulse Width (CK (L) Minimum Pulse Width (CLR, PR Minimum Setup Time S t Minimum Hold Time H t Minimum Recovery Time (CLR, PR) REC Note 3.3 ± 0.3V or 5.0 ± 0.5V CC ©1992 Fairchild Semiconductor Corporation 74VHC74 Rev. 1.3.0 V (V) Conditions CC 3.3 ± 0.3 C 15pF L C 50pF L 5.0 ± 0.5 C 15pF L C 50pF L 3.3 ± ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended exhaustive list of all such trademarks. ® ACEx Build it Now™ CorePLUS™ CROSSVOLT™ CTL™ Current Transfer Logic™ ...