89HPEB383ZBEMG IDT, 89HPEB383ZBEMG Datasheet

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89HPEB383ZBEMG

Manufacturer Part Number
89HPEB383ZBEMG
Description
Peripheral Drivers & Components - PCIs
Manufacturer
IDT
Datasheet

Specifications of 89HPEB383ZBEMG

Product Category
Peripheral Drivers & Components - PCIs
Rohs
yes
Part # Aliases
IDT89HPEB383ZBEMG
Device Overview
32b/66MHz PCI. This bridge is specified for consumer applications
providing a solution with ultra low power and highest performance in a
small package footprint. The PEB383 as a transparent bridge is plug
and play that requires no special configuration and will initialize under
standard BIOS enumeration. The typical applications that would use the
PEB383 are motherboards, digital video recorders (video surveillance),
set-top box, express cards for mobile devices, PC adapter cards, multi-
function printer, communication line cards and NICs.
Features
© 2010 Integrated Device Technology, Inc.
The PEB383 is a bridge that interfaces x1 PCI Express to
– Compliant with:
– Supports two modes of addressing:
– Packaging designed for PCB escape routing in 4-layers
– Support for Masquerade mode (can overwrite vendor and
– Support for Subsystem ID (SSID) and Subsystem Vendor ID
– JTAG IEEE 1149.1, 1149.6
– Lowest active and standby power
– Compliant with PCI Bus Power Management Interface Speci-
– Support for D0, D3 hot, D3 cold power management states
– ASPM L0s link state power management
– ASPM L1
– Standby power: 130mW
– Common PCH (Platform Controller Hub) Supply Voltages
– Supply Tolerance +/- 10%
– High throughput and low latency
– 5 times the standard read performance using Short-Term
x1 PCI Express to 32b/66MHz PCI Bridge
Ultra Low Power
High Performance
• PCI Express-to-PCI/PCI-X Bridge Specification (Revision
• PCI-to-PCI Bridge Specification (Revision 1.2)
• Transparent: For efficient, flow-through configurations
• Non-transparent: For address remapping of the PCIe and
• 14x14mm, 128 pin QFP
• 10x10mm, 132 pin QFN
device ID from EEPROM)
(SSVID)
fication (Revision 1.2)
Caching
1.0)
the PCI domains
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
®
x1 PCI Express® to 32b/66MHz
PCI Bridge
1 of 2
Block Diagram
– Compliant with PCI Express Base Specification (Revision 1.1)
– 128-byte maximum payload
– Advanced error reporting (AER) capability
– End-to-end CRC (ECRC) check and generation
– Up to four outstanding memory reads
– 512-byte read completion buffer
– Legacy interrupt signaling
– Compliant with PCI Local Bus Specification (Revision 3.0)
– 5V tolerant IO with VIO pins for added reliability and device
– Up to 66-MHz PCI bus operation
– Up to four outstanding read requests
– 1-KB read completion buffer
– Support for four external PCI bus masters through an inte-
– 5V tolerant IO with VIO pins for added reliability and device
– Subtractive decode support in order to forward legacy cycles
PCI Express Interface
PCI Interface
Legacy Mode Support
protection
grated arbiter
protection
through the bridge
Figure 1 PEB383 Block Diagram
Product Brief
January 19, 2010
PEB383

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89HPEB383ZBEMG Summary of contents

Page 1

... High Performance – High throughput and low latency – 5 times the standard read performance using Short-Term Caching IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. © 2010 Integrated Device Technology, Inc. x1 PCI Express® to 32b/66MHz PCI Bridge ◆ ...

Page 2

... PCI-enabled video decoder devices to a PCI Express slot. The PEB383 is designed to perform with low latency and a proprietary short-term caching feature that improves read performance by 500%! The PEB383 is the solution for adapter boards that require the highest bandwidth performance. 10x10 mm footprint Supports up to four ...

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