89H48H12G2ZCBL8 IDT, 89H48H12G2ZCBL8 Datasheet
89H48H12G2ZCBL8
Specifications of 89H48H12G2ZCBL8
Related parts for 89H48H12G2ZCBL8
89H48H12G2ZCBL8 Summary of contents
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... Autonomous and software managed link width and speed control – Per lane SerDes configuration IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. 2011 Integrated Device Technology, Inc. 48-Lane 12-Port PCIe® Gen2 System Interconnect Switch • ...
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... GBps (384 Gbps) of aggregated, full-duplex switching capacity through 48 integrated serial lanes, using proven and robust IDT tech- nology. Each lane is capable of 5 GT/s of bandwidth in both directions and is fully compliant with PCI Express Base specification 2.0. The PES48H12G2 is based on a flexible and efficient layered archi- tecture ...
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... IDT 89HPES48H12G2 Data Sheet Block Diagram DL/Transaction Layer DL/Transaction Layer Partition 1 – Virtual PCI Bus P2P P2P Bridge Bridge x8/x4/x2/x1 x8/x4/x2/x1 SerDes SerDes DL/Transaction Layer Route Table 12-Port Switch Core Frame Buffer DL/Transaction Layer SerDes SerDes x8/x4/x2/x1 x8/x4/x2/x1 48 PCI Express Lanes ports Ports ...
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... IDT 89HPES48H12G2 Data Sheet SMBus Interface The PES48H12G2 contains an SMBus master interface. This master interface allows the default configuration register values of the PES48H12G2 to be overridden following a reset with values programmed in an external serial EEPROM. The master interface is also used by an external Hot-Plug I/O expander ...
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... IDT 89HPES48H12G2 Data Sheet Signal PE00RP[3:0] PE00RN[3:0] PE00TP[3:0] PE00TN[3:0] PE01RP[3:0] PE01RN[3:0] PE01TP[3:0] PE01TN[3:0] PE02RP[3:0] PE02RN[3:0] PE02TP[3:0] PE02TN[3:0] PE03RP[3:0] PE03RN[3:0] PE03TP[3:0] PE03TN[3:0] PE04RP[3:0] PE04RN[3:0] PE04TP[3:0] PE04TN[3:0] PE05RP[3:0] PE05RN[3:0] PE05TP[3:0] PE05TN[3:0] PE06RP[3:0] PE06RN[3:0] PE06TP[3:0] PE06TN[3:0] PE07RP[3:0] PE07RN[3:0] PE07TP[3:0] PE07TN[3:0] PE08RP[3:0] PE08RN[3:0] PE08TP[3:0] PE08TN[3:0] ...
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... IDT 89HPES48H12G2 Data Sheet Signal PE09RP[3:0] PE09RN[3:0] PE09TP[3:0] PE09TN[3:0] PE12RP[3:0] PE12RN[3:0] PE12TP[3:0] PE12TN[3:0] PE13RP[3:0] PE13RN[3:0] PE13TP[3:0] PE13TN[3:0] Signal GCLKN[1:0] GCLKP[1:0] P[2,0]CLKN P[2,0]CLKP 1. Unused port clock pins should be connected to Vss on the board. Signal MSMBCLK MSMBDAT SSMBADDR[2,1] SSMBCLK SSMBDAT Type Name/Description I PCI Express Port 9 Serial Data Receive. Differential PCI Express receive pairs for port 9 ...
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... IDT 89HPES48H12G2 Data Sheet Signal GPIO[0] GPIO[1] GPIO[2] GPIO[3] GPIO[4] GPIO[5] GPIO[6] GPIO[7] GPIO[8] Type Name/Description I/O General Purpose I/O. This pin can be configured as a general purpose I/O pin. Alternate function pin name: PART0PERSTN Alternate function pin type: Input/Output Alternate function: Assertion of this signal initiated a partition fundamental reset in the corresponding partition ...
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... IDT 89HPES48H12G2 Data Sheet Signal CLKMODE[2:0] GCLKFSEL P01MERGEN P23MERGEN P45MERGEN P67MERGEN P89MERGEN P1213MERGEN Type Name/Description Clock Mode. These signals determine the port clocking mode used by ports of the device. I Global Clock Frequency Select. These signals select the frequency of the GCLKP and GCLKN signals. ...
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... IDT 89HPES48H12G2 Data Sheet Signal PERSTN RSTHALT SWMODE[3:0] Type Name/Description I Global Reset. Assertion of this signal resets all logic inside PES48H12G2. I Reset Halt. When this signal is asserted during a PCI Express fundamental reset, PES48H12G2 executes the reset procedure and remains in a reset state with the Master and Slave SMBuses active. This allows software to read and write registers internal to the device before normal device opera- tion begins ...
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... IDT 89HPES48H12G2 Data Sheet Signal JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRST_N Signal REFRES[13,12,9:0] REFRESPLL V CORE PEA DD V PEHA DD V PETA Type Name/Description I JTAG Clock. This is an input test clock used to clock the shifting of data into or out of the boundary scan logic or JTAG Controller. JTAG_TCK is independent of the system clock with a nominal 50% duty cycle ...
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... IDT 89HPES48H12G2 Data Sheet Pin Characteristics Note: Some input pads of the switch do not contain internal pull-ups or pull-downs. Unused SMBus and System inputs should be tied off to appropriate levels. This is especially critical for unused control signal inputs which, if left floating, could adversely affect operation. Also, any of these pins left floating can cause a slight increase in power consumption ...
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... IDT 89HPES48H12G2 Data Sheet Function PCI Express Interface PE08TP[3:0] (Cont.) PE09RN[3:0] PE09RP[3:0] PE09TN[3:0] PE09TP[3:0] PE12RN[3:0] PE12RP[3:0] PE12TN[3:0] PE12TP[3:0] PE13RN[3:0] PE13RP[3:0] PE13TN[3:0] PE13TP[3:0] GCLKN[1:0] GCLKP[1:0] P00CLKN, P00CLKP P02CLKN, P02CLKP SMBus MSMBCLK MSMBDAT SSMBADDR[2:1] SSMBCLK SSMBDAT General Purpose I/O GPIO[8:0] System Pins CLKMODE[1:0] CLKMODE[2] ...
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... IDT 89HPES48H12G2 Data Sheet Function EJTAG / JTAG JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRST_N SerDes Reference REFRES00 Resistors REFRES01 REFRES02 REFRES03 REFRES04 REFRES05 REFRES06 REFRES07 REFRES08 REFRES09 REFRES12 REFRES13 REFRESPLL 1. Internal resistor values under typical operating conditions are 92K Ω for pull-up and 91K Ω for pull-down. ...
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... IDT 89HPES48H12G2 Data Sheet Logic Diagram — PES48H12G2 Global Reference Clocks PCI Express Switch SerDes Input Port 0 PCI Express Switch SerDes Input Port 1 PCI Express Switch SerDes Input Port 2 PCI Express Switch SerDes Input Port 3 PCI Express Switch SerDes Input Port 9 ...
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... Clock source output DC impedance C-DC 1. The input clock frequency will be either 100 or 125 MHz depending on signal AC Timing Characteristics Parameter PCIe Transmit UI Unit Interval T Minimum Tx Eye Width TX-EYE T Maximum time between the jitter median and maximum TX-EYE-MEDIAN-to- deviation from the median MAX-JITTER Rise/Fall Time: 20% - 80% ...
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... Minimum, Typical, and Maximum values meet the requirements under PCI Specification 2.0 Signal GPIO 1 GPIO[8:0] 1. GPIO signals must meet the setup and hold times if they are synchronous or the minimum pulse width if they are asynchronous. 2. The values for this symbol were determined by calculation, not by testing. Description 1 Min 399 ...
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... IDT 89HPES48H12G2 Data Sheet Signal JTAG JTAG_TCK 1 JTAG_TMS , JTAG_TDI JTAG_TDO JTAG_TRST_N 1. The JTAG specification, IEEE 1149.1, recommends that JTAG_TMS should be held at 1 while the signal applied at JTAG_TRST_N changes from Otherwise, a race may occur if JTAG_TRST_N is deasserted (going from low to high rising edge of JTAG_TCK when JTAG_TMS is low, because the TAP controller might go to either the Run-Test/Idle state or stay in the Test-Logic-Reset state ...
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... IDT 89HPES48H12G2 Data Sheet Recommended Operating Supply Voltages Symbol V CORE Internal logic supply DD V I/O I/O supply except for SerDes PEA PCI Express Analog Power PEHA PCI Express Analog High Power PETA PCI Express Transmitter Analog Voltage DD V Common ground SS 1 ...
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... IDT 89HPES48H12G2 Data Sheet Power Consumption Typical power is measured under the following conditions: 25°C Ambient, 35% total link usage on all ports, typical voltages defined in Table 13 (and also listed below). Maximum power is measured under the following conditions: 70°C Ambient, 85% total link usage on all ports, maximum voltages defined in Table 13 (and also listed below) ...
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... IDT 89HPES48H12G2 Data Sheet Thermal Considerations This section describes thermal considerations for the PES48H12G2 (27mm tion that is relevant to the thermal performance of the PES48H12G2 switch. Symbol T J(max) T A(max) θ Effective Thermal Resistance, Junction-to-Ambient JA(effective) θ Thermal Resistance, Junction-to-Board JB θ Thermal Resistance, Junction-to-Case ...
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... IDT 89HPES48H12G2 Data Sheet DC Electrical Characteristics Values based on systems running at recommended supply voltages, as shown in Table 13. Note: See Table 8, Pin Characteristics, for a complete I/O listing. I/O Type Parameter Description Serial Link PCIe Transmit V Differential peak-to-peak output TX-DIFFp-p voltage V Low-Drive Differential Peak to TX-DIFFp-p-LOW ...
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... IDT 89HPES48H12G2 Data Sheet I/O Type Parameter Description Serial Link PCIe Receive (cont.) V Differential input voltage (peak-to- RX-DIFFp-p peak) RL Receiver Differential Return Loss RX-DIFF RL Receiver Common Mode Return RX-CM Loss Z Differential input impedance (DC) RX-DIFF- common mode impedance RX--DC Z Powered down input common RX-COMM-DC ...
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... IDT 89HPES48H12G2 Data Sheet Absolute Maximum Voltage Rating Core Supply 1.5V Warning: For proper and reliable operation in adherence with this data sheet, the device should not exceed the recommended operating voltages in Table 13. The absolute maximum operating voltages in Table 19 are offered to provide guidelines for voltage excursions outside the recommended voltage ranges ...
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... IDT 89HPES48H12G2 Data Sheet Symbol F SCL T BUF T HD:STA T SU:STA T SU:STO T HD:DAT T SU:DAT T TIMEOUT T LOW T HIGH POR@10kHz 1. Data at room and hot temperature. SMBus @3.3V ±10% Parameter Min Clock frequency 5 Bus free time between Stop and 3.5 Start Start condition hold time 1 Start condition setup time ...
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... IDT 89HPES48H12G2 Data Sheet PES48H12G2 Package Pinout, 27x27mm 676-BGA Signal Pinout The following table lists the pin numbers and signal names for the PES48H12G2 (27x27mm) device. Pin Function Alt Pin B10 I/O B11 B12 SS A5 PE08TP3 B13 ...
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... IDT 89HPES48H12G2 Data Sheet Pin Function Alt Pin F7 V G18 PEHA G19 DD F9 REFRES08 G20 F10 V PEHA G21 DD F11 V PETA G22 DD F12 REFRESPLL G23 F13 GCLKP0 G24 F14 V PEA G25 DD F15 P02CLKP G26 F16 REFRES02 H1 F17 V PEA H2 DD F18 V PETA ...
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... IDT 89HPES48H12G2 Data Sheet Pin Function Alt Pin L25 PE00TN3 N10 L26 PE00TP3 N11 M1 PE04TP0 N12 M2 PE04TN0 N13 M3 V N14 SS M4 PE04RN0 N15 M5 PE04RP0 N16 M6 V N17 N18 N19 N20 SS M10 V N21 SS M11 V CORE N22 DD M12 V CORE N23 ...
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... IDT 89HPES48H12G2 Data Sheet Pin Function Alt Pin U17 U18 U19 U20 U21 U22 PE13RP3 W7 U23 PE13RN3 W8 U24 U25 PE13TN3 W10 U26 PE13TP3 W11 V1 PE05TP0 W12 V2 PE05TN0 W13 V3 V W14 SS V4 PE05RN0 W15 V5 PE05RP0 W16 ...
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... IDT 89HPES48H12G2 Data Sheet Pin Function Alt Pin AC9 PE06RN2 AD7 AC10 PE06RN3 AD8 AC11 V AD9 SS AC12 PE07RN0 AD10 AC13 PE07RN1 AD11 AC14 V AD12 SS AC15 PE07RN2 AD13 AC16 PE07RN3 AD14 AC17 V AD15 SS AC18 PE12RN0 AD16 AC19 PE12RN1 AD17 AC20 V AD18 SS AC21 ...
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... IDT 89HPES48H12G2 Data Sheet Power Pins V Core V Core DD DD H11 P11 H12 P12 H15 P15 H16 P16 J11 R11 J12 R12 J15 R15 J16 R16 K11 T11 K12 T12 K15 T15 K16 T16 L11 U11 L12 U12 L15 U15 L16 U16 ...
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... IDT 89HPES48H12G2 Data Sheet Ground Pins C19 A2 C20 A4 C21 A7 C22 A10 D3 A13 D4 A16 D7 A19 D10 B1 D16 B2 D19 B4 D23 B7 D24 B10 E1 B13 E2 B16 E3 B19 E10 C3 E13 C4 E16 C5 E19 C6 E24 C10 F20 C11 F21 C12 F24 ...
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... IDT 89HPES48H12G2 Data Sheet Signals Listed Alphabetically Signal Name CLKMODE0 CLKMODE1 CLKMODE2 GCLKFSEL GCLKN0 GCLKN1 GCLKP0 GCLKP1 GPIO_00 GPIO_01 GPIO_02 GPIO_03 GPIO_04 GPIO_05 GPIO_06 GPIO_07 GPIO_08 JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRST_N MSMBCLK MSMBDAT NO CONNECT P00CLKN P00CLKP P02CLKN P02CLKP I/O Type Location I AF1 ...
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... IDT 89HPES48H12G2 Data Sheet Signal Name P01MERGEN P23MERGEN P45MERGEN P67MERGEN P89MERGEN P1213MERGEN PE00RN0 PE00RN1 PE00RN2 PE00RN3 PE00RP0 PE00RP1 PE00RP2 PE00RP3 PE00TN0 PE00TN1 PE00TN2 PE00TN3 PE00TP0 PE00TP1 PE00TP2 PE00TP3 PE01RN0 PE01RN1 PE01RN2 PE01RN3 PE01RP0 PE01RP1 PE01RP2 PE01RP3 PE01TN0 PE01TN1 PE01TN2 PE01TN3 PE01TP0 ...
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... IDT 89HPES48H12G2 Data Sheet Signal Name PE01TP2 PE01TP3 PE02RN0 PE02RN1 PE02RN2 PE02RN3 PE02RP0 PE02RP1 PE02RP2 PE02RP3 PE02TN0 PE02TN1 PE02TN2 PE02TN3 PE02TP0 PE02TP1 PE02TP2 PE02TP3 PE03RN0 PE03RN1 PE03RN2 PE03RN3 PE03RP0 PE03RP1 PE03RP2 PE03RP3 PE03TN0 PE03TN1 PE03TN2 PE03TN3 PE03TP0 PE03TP1 PE03TP2 PE03TP3 PE04RN0 ...
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... IDT 89HPES48H12G2 Data Sheet Signal Name PE04RN2 PE04RN3 PE04RP0 PE04RP1 PE04RP2 PE04RP3 PE04TN0 PE04TN1 PE04TN2 PE04TN3 PE04TP0 PE04TP1 PE04TP2 PE04TP3 PE05RN0 PE05RN1 PE05RN2 PE05RN3 PE05RP0 PE05RP1 PE05RP2 PE05RP3 PE05TN0 PE05TN1 PE05TN2 PE05TN3 PE05TP0 PE05TP1 PE05TP2 PE05TP3 PE06RN0 PE06RN1 PE06RN2 PE06RN3 PE06RP0 ...
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... IDT 89HPES48H12G2 Data Sheet Signal Name PE06RP2 PE06RP3 PE06TN0 PE06TN1 PE06TN2 PE06TN3 PE06TP0 PE06TP1 PE06TP2 PE06TP3 PE07RN0 PE07RN1 PE07RN2 PE07RN3 PE07RP0 PE07RP1 PE07RP2 PE07RP3 PE07TN0 PE07TN1 PE07TN2 PE07TN3 PE07TP0 PE07TP1 PE07TP2 PE07TP3 PE08RN0 PE08RN1 PE08RN2 PE08RN3 PE08RP0 PE08RP1 PE08RP2 PE08RP3 PE08TN0 ...
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... IDT 89HPES48H12G2 Data Sheet Signal Name PE08TN2 PE08TN3 PE08TP0 PE08TP1 PE08TP2 PE08TP3 PE09RN0 PE09RN1 PE09RN2 PE09RN3 PE09RP0 PE09RP1 PE09RP2 PE09RP3 PE09TN0 PE09TN1 PE09TN2 PE09TN3 PE09TP0 PE09TP1 PE09TP2 PE09TP3 PE12RN0 PE12RN1 PE12RN2 PE12RN3 PE12RP0 PE12RP1 PE12RP2 PE12RP3 PE12TN0 PE12TN1 PE12TN2 PE12TN3 PE12TP0 ...
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... IDT 89HPES48H12G2 Data Sheet Signal Name PE12TP2 PE12TP3 PE13RN0 PE13RN1 PE13RN2 PE13RN3 PE13RP0 PE13RP1 PE13RP2 PE13RP3 PE13TN0 PE13TN1 PE13TN2 PE13TN3 PE13TP0 PE13TP1 PE13TP2 PE13TP3 PERSTN REFRES00 REFRES01 REFRES02 REFRES03 REFRES04 REFRES05 REFRES06 REFRES07 REFRES08 REFRES09 REFRES12 REFRES13 REFRESPLL RSTHALT I/O Type Location ...
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... IDT 89HPES48H12G2 Data Sheet Signal Name SSMBADDR1 SSMBADDR2 SSMBCLK SSMBDAT SWMODE0 SWMODE1 SWMODE2 SWMODE3 V CORE PEA PETA I/O Type Location I C26 I B26 I/O C25 I/O B25 I AD5 I AE5 I AF4 I AF5 I/O, See Table 24 for a listing of power pins. PEHA, See Table 26 for a listing of ground pins. ...
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... IDT 89HPES48H12G2 Data Sheet PES48H12G2 Pinout — Top View Core (Power I/O (Power) DD Vss (Ground ...
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... IDT 89HPES48H12G2 Data Sheet PES48H12G2 Package Drawing — 676-Pin BL676/BLG676 November 28, 2011 ...
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... IDT 89HPES48H12G2 Data Sheet Option A Package Drawing — Page Two November 28, 2011 ...
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... IDT 89HPES48H12G2 Data Sheet Revision History January 21, 2010: Publication of Final data sheet. March 30, 2011: In Table 13, added V November 28, 2011: Added new Tables 20 and 21, SMBus Characterization and Timing. PETA to footnote # November 28, 2011 ...
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... IDT 89HPES48H12G2 Data Sheet Ordering Information NN A NNANN Product Operating Product Family Voltage Detail Valid Combinations 89H48H12G2ZBBL 676-ball FCBGA package, Commercial Temperature 89H48H12G2ZBBLG 676-ball Green FCBGA package, Commercial Temperature 89H48H12G2ZBBLI 676-ball FCBGA package, Industrial Temperature 89H48H12G2ZBBLGI 676-ball Green FCBGA package, Industrial Temperature ...