MAX3420EETG-T Maxim Integrated, MAX3420EETG-T Datasheet

MAX3420EETG-T

Manufacturer Part Number

MAX3420EETG-T

Description

Peripheral Drivers & Components - PCIs

Manufacturer

Maxim Integrated

Datasheet

1.MAX3420EETG-T.pdf (22 pages)

Specifications of MAX3420EETG-T

Maximum Operating Temperature

+ 85 C

Package / Case

TQFN-24 EP

Minimum Operating Temperature

- 40 C

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Pin Configurations appear at end of data sheet.

Functional Diagrams continued at end of data sheet.

UCSP is a trademark of Maxim Integrated Products, Inc.

For pricing, delivery, and ordering information, please contact Maxim Direct

at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.

The MAX3420E contains the digital logic and analog

circuitry necessary to implement a full-speed USB

peripheral compliant to USB specification rev 2.0. A

built-in full-speed transceiver features ±15kV ESD pro-

tection and programmable USB connect and discon-

nect. An internal serial-interface engine (SIE) handles

low-level USB protocol details such as error checking

and bus retries. The MAX3420E operates using a regis-

ter set accessed by an SPI™ interface that operates up

to 26MHz. Any SPI master (microprocessor, ASIC, DSP,

etc.) can add USB functionality using the simple 3- or

4-wire SPI interface.

Internal level translators allow the SPI interface to run at

a system voltage between 1.71V and 3.6V. USB timed

operations are done inside the MAX3420E with inter-

rupts provided at completion so an SPI master does not

need timers to meet USB timing requirements. The

MAX3420E includes four general-purpose inputs and

outputs so any microprocessor that uses I/O pins to

implement the SPI interface can reclaim the I/O pins

and gain additional ones.

The MAX3420E operates over the extended -40°C to

+85°C temperature range and is available in a 32-pin

LQFP package (7mm x 7mm) and a space-saving 24-

pin TQFN package (4mm x 4mm).

+Denotes a lead(Pb)-free/RoHS-compliant package.

/V denotes an automotive qualified part.

SPI is a trademark of Motorola, Inc.

MAX3420EETG+

MAX3420EECJ+

MAX3420EECJ/V+

EP = Exposed pad.

Cell Phones

PC Peripherals

Microprocessors and

DSPs

Custom USB Devices

Cameras

PART

-40°C to +85°C

TEMP RANGE

Functional Diagrams

Ordering Information

General Description

Desktop Routers

PLCs

Set-Top Boxes

PDAs

MP3 Players

Instrumentation

Applications

PIN-PACKAGE

24 TQFN-EP*

32 LQFP

USB Peripheral Controller

♦ Microprocessor-Independent USB Solution

♦ Complies with USB Specification Revision 2.0

♦ Integrated Full-Speed USB Transceiver

♦ Firmware/Hardware Control of an Internal D+

♦ Programmable 3- or 4-Wire 26MHz SPI Interface

♦ Level Translators and V

♦ Internal Comparator Detects V

♦ ESD Protection on D+, D-, and VBCOMP

♦ Interrupt Output Pin (Level or Programmable

♦ Intelligent USB Serial-Interface Engine (SIE)

♦ Built-In Endpoint FIFOs

♦ Double-Buffered Data Endpoints Increase

♦ SETUP Data Has Its Own 8-Byte FIFO, Simplifying

♦ Four General-Purpose Inputs and Four General-

♦ Space-Saving LQFP and TQFN Packages

(Full-Speed Operation)

Pullup Resistor

System Interface Voltage

Self-Powered Applications

Edge) Allows Polled or Interrupt-Driven SPI

Interface

Throughput by Allowing the SPI Master to

Transfer Data Concurrently with USB Transfers

Over the Same Endpoint

Firmware

Purpose Outputs

Automatically Handles USB Flow Control and

Double Buffering

Handles Low-Level USB Signaling Details

Contains Timers for USB Time-Sensitive

Operations So SPI Master Does Not Need to

Time Events

EP0: CONTROL (64 Bytes)

EP1: OUT, Bulk or Interrupt, 2 x 64 Bytes

(Double-Buffered)

EP2: IN, Bulk or Interrupt, 2 x 64 Bytes

(Double-Buffered)

EP3: IN, Bulk or Interrupt (64 Bytes)

with SPI Interface

MAX3420E

Input Allow Independent

BUS

19-3781; Rev 3; 12/10

for

Features

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