MAX9400EHJ+ Maxim Integrated, MAX9400EHJ+ Datasheet

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MAX9400EHJ+

Manufacturer Part Number
MAX9400EHJ+
Description
Buffers & Line Drivers
Manufacturer
Maxim Integrated
Datasheet

Specifications of MAX9400EHJ+

Rohs
yes
Supply Voltage - Max
+/- 5.5 V
Supply Voltage - Min
+/- 2.375 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TQFP-32
Minimum Operating Temperature
- 40 C
Supply Current
180 mA
The MAX9400/MAX9402/MAX9403/MAX9405 are
extremely fast, low-skew quad LVECL/ECL or LVPECL/
PECL buffer/receivers designed for high-speed data
and clock driver applications. These devices feature an
ultra-low propagation delay of 335ps and channel-to-
channel skew of 16ps in asynchronous mode with
86mA supply current.
The four channels can be operated synchronously with
an external clock, or in asynchronous mode determined
by the state of the SEL input. An enable input provides
the ability to force all the outputs to a differential low
state.
A variety of input and output terminations are offered for
maximum design flexibility. The MAX9400 has open
inputs and open emitter outputs. The MAX9402 has
open inputs and 50Ω series outputs. The MAX9403 has
100Ω differential input impedance and open emitter
outputs. The MAX9405 has 100Ω differential input
impedance and 50Ω series outputs.
These devices operate with a supply voltage of (V
V
from -40°C to +85°C. These devices are offered in
space-saving 32-pin 5mm
5mm
19-2223; Rev 2; 1/05
Functional Diagram appears at end of data sheet.
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
EE
) = 2.375V to 5.5V, and are specified for operation
Data and Clock Driver and Buffer
Central Office Backplane Clock Distribution
DSLAM Backplane
Base Station
ATE
5mm QFN packages.
________________________________________________________________ Maxim Integrated Products
General Description
5mm TQFP and 32-lead
Applications
Quad Differential LVECL/LVPECL
CC
-
♦ 400mV Differential Output at 3.0GHz Data Rate
♦ 335ps Propagation Delay in Asynchronous Mode
♦ 8ps Channel-to-Channel Skew in Synchronous
♦ Integrated 50Ω Outputs (MAX9402/MAX9405)
♦ Integrated 100Ω Inputs (MAX9403/MAX9405)
♦ Synchronous/Asynchronous Operation
*Future product—contact factory for availability.
MAX9400EHJ -40°C to +85°C 32 TQFP
MAX9400EGJ* -40°C to +85°C 32 QFN
MAX9402EHJ -40°C to +85°C 32 TQFP
MAX9402EGJ* -40°C to +85°C 32 QFN
MAX9403EHJ -40°C to +85°C 32 TQFP
MAX9403EGJ* -40°C to +85°C 32 QFN
MAX9405EHJ -40°C to +85°C 32 TQFP
MAX9405EGJ* -40°C to +85°C 32 QFN
Pin Configurations continued at end of data sheet.
Mode
PART
V
CLK
CLK
V
SEL
SEL
TOP VIEW
EN
EN
CC
CC
1
4
2
3
5
6
7
8
Buffer/Receivers
32
9
RANGE
TQFP (5mm x 5mm)
TEMP
10
31
Ordering Information
11
30
MAX9400
MAX9402
MAX9403
MAX9405
Pin Configurations
29
12
PACKAGE
PIN-
13
28
14
27
15
26
INPUT
16
25
DATA
Open
Open
Open
Open
100Ω
100Ω
100Ω
100Ω
Features
24 V
23 OUT1
22
21
20
19
18
17
OUT1
V
V
OUT2
OUT2
V
OUTPUT
EE
CC
EE
CC
Open
Open
Open
Open
50Ω
50Ω
50Ω
50Ω
1

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MAX9400EHJ+ Summary of contents

Page 1

... DSLAM Backplane Base Station ATE Functional Diagram appears at end of data sheet. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. Quad Differential LVECL/LVPECL ♦ 400mV Differential Output at 3.0GHz Data Rate ♦ ...

Page 2

Quad Differential LVECL/LVPECL Buffer/Receivers ABSOLUTE MAXIMUM RATINGS ................................................................-0. Inputs to V ...............................................-0. Differential Input Voltage .......................................................±3V Continuous Output Current .................................................50mA Surge Output Current........................................................100mA Continuous Power Dissipation (T = +70°C) A ...

Page 3

AC ELECTRICAL CHARACTERISTICS ( 2.375V to 5.5V, outputs terminated with 50Ω ± time = 125ps (20% to 80%), IHD EE unless otherwise noted. Typical values are at V noted.) (Notes ...

Page 4

Quad Differential LVECL/LVPECL Buffer/Receivers ( 3.3V, MAX9400, outputs terminated with 50Ω ± input transition time = 125ps (20% to 80%), V SUPPLY CURRENT ( vs. TEMPERATURE ...

Page 5

PIN NAME 1, 8,11, Positive Supply Voltage. Bypass 17, 24, 30 capacitors as close to the device as possible with the smaller value capacitor closest to the device. Noninverting Differential Select Input. Setting SEL = high and ...

Page 6

Quad Differential LVECL/LVPECL Buffer/Receivers Detailed Description The MAX9400/MAX9402/MAX9403/MAX9405 are extremely fast, low-skew quad LVECL/ECL or LVPECL/ PECL buffer/receivers designed for high-speed data and clock driver applications. The devices feature an ultra-low propagation delay of 335ps and channel-to- channel skew of ...

Page 7

Minimize skew by matching the electrical length of the traces INPUT VOLTAGE DEFINITION Figure 1. Input and Output Voltage Definitions IN_ IN_ MAX9400/MAX9402 MAX9400/MAX9403 Figure ...

Page 8

Quad Differential LVECL/LVPECL Buffer/Receivers IN_ IN_ OUT_ OUT_ DIFFERENTIAL OUTPUT WAVEFORM OUT_ - OUT_ Figure 3. IN-to-OUT Propagation Delay and Transition Timing Diagram CLK CLK t H IN_ IN_ OUT_ OUT_ Figure 4. CLK-to-OUT Propagation Delay Timing Diagram 8 _______________________________________________________________________________________ ...

Page 9

IN_ 100Ω IN_ 1kΩ 1/4 MAX9400/MAX9402 Figure 5. Input Bias Circuits for Unused Inputs Pin Configurations (continued) TOP VIEW * SEL 2 SEL 3 MAX9400 CLK 4 MAX9402 MAX9403 CLK 5 MAX9405 EN 6 *EXPOSED PADDLE EN ...

Page 10

Quad Differential LVECL/LVPECL Buffer/Receivers IN0 IN0 IN1 IN1 IN2 IN2 IN3 IN3 CLK CLK SEL SEL ______________________________________________________________________________________ ...

Page 11

For the latest package outline information www.maxim-ic.com/packages.) ______________________________________________________________________________________ Quad Differential LVECL/LVPECL Buffer/Receivers Package Information PACKAGE OUTLINE, 32L TQFP, 5x5x1.0mm 1 B 21-0110 2 PACKAGE ...

Page 12

Quad Differential LVECL/LVPECL Buffer/Receivers (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/packages. 12 ______________________________________________________________________________________ Package Information (continued) ...

Page 13

... Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 13 © 2005 Maxim Integrated Products ...

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