MAX8741EAI+T Maxim Integrated, MAX8741EAI+T Datasheet - Page 24

• Manufacturer Part Number: MAX8741EAI+T
• Description: Current & Power Monitors & Regulators 500kHz Multi-Out Pwr Supply Controller
• Manufacturer: Maxim Integrated

Specifications of MAX8741EAI+T

• Rohs: yes
• Product: Power Monitors
• Supply Voltage - Max: 30 V
• Supply Voltage - Min: 4.2 V
• Input Voltage Range: 4.2 V to 30 V

500kHz Multi-Output Power-Supply Controllers
with High Impedance in Shutdown
The secondary diode in coupled-inductor applications
must withstand flyback voltages greater than 60V,
which usually rules out most Schottky rectifiers.
Common silicon rectifiers, such as the 1N4001, are also
prohibited because they are too slow. This often makes
fast silicon rectifiers such as the MURS120 the only
choice. The flyback voltage across the rectifier is relat-
ed to the V
former turns ratio:
where:
N = the transformer turns ratio SEC/PRI
V
V
Subtract the main output voltage (V
V
returned to V
breakdown rating must also accommodate any ringing
due to leakage inductance. The rectifier diode’s current
rating should be at least twice the DC load current on
the secondary output.
Low input voltages and low input-output differential volt-
ages each require extra care in their design. Low
absolute input voltages can cause the V
to enter dropout and eventually shut itself off. Low input
voltages relative to the output (low V
can cause bad load regulation in multi-output flyback
applications (see the design equations in the Transformer
Design section). Also, low V
also cause the output voltage to sag when the load cur-
rent changes abruptly. The amplitude of the sag is a
function of inductor value and maximum duty factor (an
Electrical Characteristics parameter, 97% guaranteed
over temperature at f = 333kHz), as follows:
The cure for low-voltage sag is to increase the output
capacitor’s value. Take a 333kHz/6A application circuit
as an example, at V
f = 333kHz, I
tance of 470µF keeps the sag less than 200mV. The
capacitance is higher than that shown in the Typical
Application Circuit because of the lower input voltage.
Note that only the capacitance requirement increases
24
SEC
OUT
FLYBACK
______________________________________________________________________________________
Rectifier Diode (Transformer Secondary Diode)
= the maximum secondary DC output voltage
= the primary (main) output voltage
V
SAG
V
FLYBACK
in this equation if the secondary winding is
IN
=
OUT
STEP
- V
2
×
OUT
and not to ground. The diode reverse-
C
= 3A (half-load step), a total capaci-
OUT
IN
= V
difference, according to the trans-
= +5.5V, V
SEC
×
(
V
I
STEP
IN MIN
+ (V
(
IN
2
Low-Voltage Operation
- V
IN
×
)
OUT
×
L
- V
OUT
D
IN
MAX
OUT
- V
= +5V, L = 6.7µH,
L
differentials can
OUT
-
linear regulator
)
V
✕
OUT
OUT
N
differential)
)
) from
and the ESR requirements do not change. Therefore,
the added capacitance can be supplied by a low-cost
bulk capacitor in parallel with the normal low-ESR
capacitor.
The major efficiency-loss mechanisms under loads are,
in the usual order of importance:
• P(I
• P(tran) = transition losses
• P(gate) = gate-charge losses
• P(diode) = diode-conduction losses
• P(cap) = input capacitor ESR losses
• P(IC) = losses due to the IC’s operating supply current
Inductor core losses are fairly low at heavy loads
because the inductor’s AC current component is small.
Therefore, they are not accounted for in this analysis.
Ferrite cores are preferred, especially at 300kHz, but
powdered cores, such as Kool-Mu, can work well:
Efficiency = P
✕
P
P(cap) + P(IC)
P (I
where R
the MOSFET on-resistance, and R
sense resistor value. The R
cal MOSFETs for the high-side and low-side switches
because they time-share the inductor current. If the
MOSFETs are not identical, their losses can be estimat-
ed by averaging the losses according to duty factor:
where C
high-side MOSFET (a data sheet parameter), I
the DH gate-driver peak output current (1.5A typ), and
20ns is the rise/fall time of the DH driver (20ns typ):
where V
Q
and high-side switches. For matched MOSFETs, Q
twice the data sheet value of an individual MOSFET. If
V
tion with V
TOTAL
OUT
G
100%
2
is the sum of the gate-charge values for low-side
R) = I
P tran
2
(
R) = I
is set to less than 4.5V, replace V
Heavy-Load Efficiency Considerations
= P(I
L
DC
RSS
LOAD
is the internal-logic-supply voltage (5V), and
)
=
2
is the DC resistance of the coil, R
BATT
R losses
2
V
is the reverse transfer capacitance of the
f
OUT
R) + P(tran) + P(gate) + P(diode) +
IN
×
2
Applications Information
x (R
2
×
3
P(gate) = Q
/P
. In this case, efficiency can be
I
×
LOAD
IN
DC
[
(
✕
V
IN
100% = P
+ R
×
×
DS(ON)
C
DS(ON)
G
RSS GATE
✕
f
/
OUT
I
✕
SENSE
term assumes identi-
+ R
V
L
/(P
SENSE
)
OUT
-
L
is the current-
20
in this equa-
ns
)
+ P
DS(ON)
]
GATE
TOTAL
G
is
is
is
)