IS31FL3216-QFLS2-TR ISSI, IS31FL3216-QFLS2-TR Datasheet - Page 13

• Manufacturer Part Number: IS31FL3216-QFLS2-TR
• Description: LED Lighting Drivers 16 Indpendent Chs Fun LED Drvr
• Manufacturer: ISSI

Specifications of IS31FL3216-QFLS2-TR

• Operating Frequency: 400 kHz
• Maximum Supply Current: 5.2 mA
• Output Current: 20 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-28
• Factory Pack Quantity: 2500

IS31FL3216
AUTO FRAME PLAY MODE
By setting the MODE bit of the Configuration Register
(00h) to “01”, the IS31FL3216 operates in Auto Frame
Play Mode. It stores data of 8 frames and automatically
plays in order. Customers can configure the delay time
between each two frames and the first playing frame by
setting the Frame Delay Register (B6h) and the Frame
Start Register (B7h).
AUDIO FRAME MODE
By setting the MODE bit of the Configuration Register
(00h) to “10”, the IS31FL3216 operates in Audio Frame
Mode. It stores data of 8 frames and the 8 frames
playing follow the input signal. 09h register is used to
set the ADC sample rate for the input signal to control
frames playing. It plays the first frame when the value is
the smallest and plays the eighth frame when the value
is the biggest (See Table 14).
AUDIO MODULATED MODE AND GAIN SETTING
By setting the AE bit of the Configuration Register to “1”,
IS31FL3216 operates in Audio Modulated Mode. The
intensity of LEDs is adjusted by the input signal. The
audio input gain can be set by the Lighting Effect
Register (03h).
CHANNEL MODE SETTING
IS31FL3216 has 16 channels for LEDs output.
OUT9~OUT16 also can be set as GPIO ports. By
setting the OUTx bit of the Channel Register to “1”, the
corresponding channel will be used as GPIO port.
When the OUTx is set to “0”, the corresponding
channel will be used as LED output.
Integrated Silicon Solution, Inc. – www.issi.com
Rev.A, 12/27/2011
CASCADE FOR SYNCHRONIZATION OF CHIPS
Operating in the cascade mode can make two chips
synchronize. By setting the CM bit of the Lighting
Effect Register (03h) to “0”, IS31FL3216 operates as a
master. The CLK pin offers the output clock signal.
When the CM bit sets to “1”, IS31FL3216 operates as a
slave. The CLK pin as a clock input pin. If there is only
one chip to use, setting CM bit to “0” and the CLK pin
should be floating.
INTERRUPT FUNCTION
When OUT9~OUT16 configure as input port and the
interrupt function enabled, the INTB pin is available. If
any input port of OUT9~OUT16 has state changing,
the INTB pin will be pulled low. The MCU can get the
information via reading the State Register (08h). The
INTB will be back to high until the MCU reading the
State Register (08h).
SHUTDOWN MODE
Shutdown mode can either be used as a means of
reducing power. During shutdown mode all registers
retain their data and OUT9~OUT16 still can be
available as GPIO port.
SOFTWARE SHUTDOWN
By setting SSD bit of the Configuration Register (00h)
to “0”, the IS31FL3216 will operate in software
shutdown mode, wherein they consume only 1μA (Typ.)
current. When the IS31FL3216 is in software shutdown
mode, all current sources are switched off.
HARDWARE SHUTDOWN
The chip enters hardware shutdown mode when the
SDB pin is pulled low.
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