HV9986K6-G Supertex, HV9986K6-G Datasheet - Page 6

• Manufacturer Part Number: HV9986K6-G
• Description: LED Lighting Drivers 3CH CLSD LOOP SW MD LED DRVR w/EXT RESET
• Manufacturer: Supertex

Specifications of HV9986K6-G

• Factory Pack Quantity: 490

Functional Description
Power Topology
The HV9986 is a three-channel, switch-mode converter LED
driver designed to control a boost, a buck or a SEPIC con-
verter in a constant frequency, peak current controlled mode.
The IC includes an internal linear regulator, which operates
from input voltages 10 to 40V. The IC can also be powered
directly using the VDD pins and bypassing the internal linear
regulator. The IC includes features typically required in LED
drivers like open LED protection, output short circuit protec-
tion, linear and PWM dimming, and accurate control of the
LED current.
Each channel of the IC is independent of the other channels
and a fault on one channel will not affect the performance of
the other two channels. There is no built-in hiccup timer, but
the fault channel can be reset with an external reset signal.
This allows the user full control over the behavior of the fault
condition enabling intelligent control of the three channels
using an external microcontroller.
The IC is ideally suited for backlight application using either
RGB or multi-channel white LED configurations.
Power Supply to the IC (VIN, VDD, VDD1-3)
The HV9986 can be powered directly from its VIN pin that
takes a voltage up to 40V. When a voltage is applied at the
VIN pin, the HV9986 tries to maintain a constant 5.0V (typ.)
at the VDD pin. The regulator also has a built in under-volt-
age lockout which shuts the IC off if the voltage at the VDD
pin falls below the UVLO threshold. By connecting this VDD
pin to the individual VDD pins of the three channels, the
internal regulator can be used to power all three channels
in the IC.
In case the internal regulator is not utilized, an external pow-
er supply (5.0V +/ 10%) can be used to power the IC. In this
case, the power supply is directly connected to the VDD pins
and the VIN pin.
All four VDD pins must by bypassed by a low ESR capaci-
tor (≥0.1μF) to provide a low impedance path for the high
frequency current of the output gate driver. These capaci-
tors must be referenced to the individual grounds for proper
noise rejection (see Layout Guidelines section for more in-
formation). Also, in all cases, the four VDD pins must be con-
nected together externally.
The input current drawn from the external power supply (or
VIN pin) is a sum of the 1.0mA (max) current drawn by the
all the internal circuitry (for all three channels) and the cur-
rent drawn by the gate drivers (which in turn depends on
the switching frequency and the gate charge of the external
FET).
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1235 Bordeaux Drive, Sunnyvale, CA 94089
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In the above equation, f
converters and Q
FETs (which can be obtained from the FET datasheets).
The EN pin is a TTL compatible input used to disable the IC.
Pulling the EN pin to GND will shut down the IC and reduce
the quiescent current drawn by the IC to be less than 200μA.
If the enable function is not required, the EN pin can be con-
nected to VDD.
Clock Input (CLK)
The switching frequency of the converters can be set in one
of two ways. One way to set the switching frequency is to
use the on-chip oscillator using a resistor at the RT pin. In
this case, the CLK pin should be connected to GND. If the
on-chip clock is used, two or more HV9986s cannot be syn-
chronized to each other.
The other way to is set the switching frequency by using
a TTL compatible square wave input at the CLK pin. The
switching frequencies of the three converters will be 1/12th
the frequency of the external clock. By using the same clock
for multiple ICs, all the ICs can be synchronized together. In
this case, the RT pin can be either left open or connected to
VDD.
Current Sense (CS1-3)
The current sense input is used to sense the source current
of the switching FET. Each CS input of the HV9986 includes
a built-in 100ns (minimum) blanking time to prevent spurious
turn off due to the initial current spike when the FET turns
on.
The IC includes an internal resistor divider network, which
steps down the voltage at the COMP pins by a factor of 9.
This voltage is used as the reference for the current sense
comparators. Since the maximum voltage of the COMP pin
is approximately V
reference current for the current sense comparator and thus
the maximum inductor current.
The current sense resistor R
input inductor current is limited to below the saturation cur-
rent level of the input inductor. For discontinuous conduction
mode of operation, no slope compensation is necessary. In
this case, the current sense resistor is chosen as:
where I
I
R
IN
CS
= 1mA + (Q
L,PK
=
is the peak inductor current.
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V
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DD
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– 1V
L,PK
G1-3
G1
DD
+Q
, this voltage determines the maximum
are the gate charges of the external
G2
S
+ Q
is the switching frequency of the
CS
●
G3
should be chosen so that the
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HV9986