25AA080D-I/P Microchip Technology, 25AA080D-I/P Datasheet - Page 12
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
25AA080D-I/P
Manufacturer Part Number
25AA080D-I/P
Description
IC SRL EEPROM 1KX8 1.8V 8-PDIP
Manufacturer
Microchip Technology
Specifications of 25AA080D-I/P
Memory Size
8K (1K x 8)
Package / Case
8-DIP (0.300", 7.62mm)
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Speed
3MHZ, 5MHZ, 10MHZ
Interface
SPI, 3-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Organization
1 K x 8
Interface Type
SPI
Maximum Clock Frequency
10 MHz
Access Time
160 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Maximum Operating Current
5 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
2.5 V, 3.3 V, 5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
25AA080D-I/P
Manufacturer:
MIC
Quantity:
20 000
25XX080C/D
2.7
The following protection has been implemented to
prevent inadvertent writes to the array:
• The write enable latch is reset on power-up
• A write enable instruction must be issued to set
• After a byte write, page write or STATUS register
• CS must be set high after the proper number of
• Access to the array during an internal write cycle
TABLE 2-4:
DS22151A-page 12
x = don’t care
the write enable latch
write, the write enable latch is reset
clock cycles to start an internal write cycle
is ignored and programming is continued
(SR bit 1)
WEL
0
1
1
1
Data Protection
WRITE-PROTECT FUNCTIONALITY MATRIX
(SR bit 7)
WPEN
x
0
1
1
1 (high)
0 (low)
(pin 3)
WP
x
x
Protected Blocks
Protected
Protected
Protected
Protected
2.8
The 25XX080C/D powers on in the following state:
• The device is in low-power Standby mode
• The write enable latch is reset
• SO is in high-impedance state
• A high-to-low-level transition on CS is required to
(CS = 1)
enter active state
Unprotected Blocks
Power-On State
Protected
Writable
Writable
Writable
© 2009 Microchip Technology Inc.
STATUS Register
Protected
Protected
Writable
Writable