25AA512-I/SN Microchip Technology, 25AA512-I/SN Datasheet
25AA512-I/SN
Specifications of 25AA512-I/SN
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25AA512-I/SN Summary of contents
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... Temp. Ranges 128 Byte I Description: The Microchip Technology Inc. 25AA512 is a 512 Kbit serial EEPROM memory with byte-level and page-level serial EEPROM functions. It also features Page, Sector and Chip erase functions typically associated with Flash-based products. These functions are not required for byte or page write operations ...
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... ELECTRICAL CHARACTERISTICS (†) Absolute Maximum Ratings V .............................................................................................................................................................................6.5V CC All inputs and outputs w.r.t. V ......................................................................................................... -0. Storage temperature .................................................................................................................................-65°C to 150°C Ambient temperature under bias ...............................................................................................................-40°C to 125°C ESD protection on all pins ..........................................................................................................................................4 kV † NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device ...
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... V — 250 ns 2.0 — ns (Note 1) 25AA512 V = 1. 2.0V to 5.5V CC Conditions 5.5 CC 5.5 CC <2.5 at 0°C to +85°C CC <2.5 at -40°C to +85°C CC 5.5 CC 5.5 CC < ...
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... TABLE 1-2: AC CHARACTERISTICS (CONTINUED) AC CHARACTERISTICS Param. Sym. Characteristic No Output disable time DIS 16 T HOLD setup time HOLD hold time HOLD low to output HZ High HOLD high to output HV valid High to Standby REL mode High to Deep power- PD down 22 T Chip erase cycle time ...
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... FIGURE 1-1: HOLD TIMING SCK 18 High-Impedance Don’t Care HOLD FIGURE 1-2: SERIAL INPUT TIMING CS 2 Mode 1,1 Mode 0,0 SCK MSB in SO 2010 Microchip Technology Inc. — (Note 1) (Note 2) — High-Impedance 25AA512 High-Impedance Don’t Care LSB in DS22021F-page 5 ...
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... FIGURE 1-3: SERIAL OUTPUT TIMING SCK 13 MSB out SO SI DS22021F-page 6 14 Don’t Care 3 Mode 1,1 Mode 0,0 15 LSB out 2010 Microchip Technology Inc. ...
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... CS goes low. If the clock line is shared with other peripheral devices on the SPI bus, the user can assert the HOLD input and place the 25AA512 in ‘HOLD’ mode. After releasing the HOLD pin, operation will resume from the point when the HOLD was asserted. ...
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... Read Sequence The device is selected by pulling CS low. The 8-bit READ instruction is transmitted to the 25AA512 fol- lowed by the 16-bit address. After the correct READ instruction and address are sent, the data stored in the memory at the selected address is shifted out on the SO pin. The data stored in the memory at the next ...
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... Write Sequence Prior to any attempt to write data to the 25AA512, the write enable latch must be set by issuing the WREN instruction (Figure 2-4). This is done by setting CS low and then clocking out the proper instruction into the 25AA512. After all eight bits of the instruction are trans- mitted, the CS must be brought high to set the write enable latch ...
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... FIGURE 2-3: PAGE WRITE SEQUENCE SCK Instruction SCK Data Byte DS22021F-page 16-bit Address Data Byte Data Byte Data Byte n (128 max 2010 Microchip Technology Inc. ...
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... Write Enable (WREN) and Write Disable (WRDI) The 25AA512 contains a write enable latch. Table 2-4 for the Write-Protect Functionality Matrix. This latch must be set before any write operation will be completed internally. The WREN instruction will set the latch, and the WRDI will reset the latch. ...
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... X X BP1 BP0 W/R = writable/readable read-only. The Write-In-Process (WIP) bit indicates whether the 25AA512 is busy with a write operation. When set ‘ ’, a write is in progress, when set to a ‘ in progress. This bit is read-only. FIGURE 2-6: READ STATUS REGISTER TIMING SEQUENCE (RDSR) ...
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... Array Addresses Write-Protected none Upper 1/4 (Sector 3) (C000h-FFFFh) Upper 1/2 (Sectors 2 & 3) (8000h-FFFFh) All (Sectors & 3) (0000h-FFFFh Data to STATUS Register High-Impedance 25AA512 Array Addresses Unprotected All (Sectors & 3) (0000h-FFFFh) Lower 3/4 (Sectors 0, 1 & 2) (0000h-BFFFh) Lower 1/2 (Sectors 0 & 1) (0000h-7FFFh) none DS22021F-page 13 ...
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... DS22021F-page 14 2.7 Power-On State The 25AA512 powers on in the following state: • The device is in low-power Standby mode ( • The write enable latch is reset • high-impedance state • A high-to-low-level transition required to enter active state Protected Blocks ...
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... A Write Enable (WREN) instruc- tion must be given prior to attempting a PAGE ERASE. This is done by setting CS low and then clocking out the proper instruction into the 25AA512. After all eight bits of the instruction are transmitted, the CS must be brought high to set the write enable latch. ...
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... A Write Enable (WREN) instruction must be given prior to attempting a SECTOR ERASE. This is done by setting CS low and then clock- ing out the proper instruction into the 25AA512. After all eight bits of the instruction are transmitted, the CS must be brought high to set the write enable latch. ...
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... A Write Enable (WREN) instruction must be given prior to executing a CHIP ERASE. This is done by setting CS low and then clocking out the proper instruction into the 25AA512. After all eight bits of the instruction are transmitted, the CS must be brought high to set the write enable latch. ...
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... DEEP POWER-DOWN MODE Deep Power-Down mode of the 25AA512 is its lowest power consumption state. The device will not respond to any of the Read or Write commands while in Deep Power-Down mode, and therefore it can be used as an additional software write protection feature. The Deep Power-Down mode is entered by driving CS low, followed by the instruction code (Figure 2-11) onto the SI line, followed by driving CS high ...
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... If additional clock cycles are sent after the electronic signature has been read once, it will continue to output the signature on the SO line until the sequence is terminated 16-bit Address High-Impedance 25AA512 Electronic Signature Out Manufacturer’ 0x29 that occurs before the device REL T REL ...
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... After power- up, a low level required prior to any sequence being initiated. 3.2 Serial Output (SO) The SO pin is used to transfer data out of the 25AA512. During a read cycle, data is shifted out on this pin after the falling edge of the serial clock. 3.3 Write-Protect (WP) ...
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... Part number or part number code Temperature (I) Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code (2 characters for small packages) Pb-free JEDEC designator for Matte Tin (Sn) 25AA512 DS22021F-page 21 ...
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... PP %RG\ >')16@ 1RWH NOTE TOP VIEW A3 1RWHV DS22021F-page EXPOSED PAD BOTTOM VIEW A A1 NOTE NOTE 2010 Microchip Technology Inc. ...
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... Microchip Technology Inc. 25AA512 DS22021F-page 23 ...
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... PLO %RG\ >3',3@ 1RWH N NOTE 1RWHV DS22021F-page 2010 Microchip Technology Inc. ...
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... PP %RG\ >62,&@ 1RWH N NOTE 1RWHV 2010 Microchip Technology Inc φ 25AA512 α c β DS22021F-page 25 ...
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... PP %RG\ >62,&@ 1RWH DS22021F-page 26 2010 Microchip Technology Inc. ...
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... Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2010 Microchip Technology Inc. 25AA512 DS22021F-page 27 ...
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... Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS22021F-page 28 2010 Microchip Technology Inc. ...
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... Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2010 Microchip Technology Inc. 25AA512 DS22021F-page 29 ...
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... APPENDIX A: REVISION HISTORY Revision A Original release. Revision B (06/2007) Revised Device Selection Table; Revised Features section; Revised Table 1-1 DC Characteristics; Revised Table 1-2 AC Characteristics; Replaced Pack- age Drawings (Rev. AP); Revised Package Marking (SOIC, SOIJ); Revised Product ID section. Revision C (10/2007) Removed 25LC512 part number; New data sheet created for 25LC512 (DS22065) ...
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... Local sales offices are also available to help customers. A listing of sales offices and locations is included in the back of this document. Technical support is available through the web site at: http://support.microchip.com Preliminary 25AA512 should contact their distributor, DS22021F-page 31 ...
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... Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Y Device: 25AA512 Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs you find the organization of this document easy to follow? If not, why? 4 ...
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... Examples: a) Package b) c) 25AA512 . 25AA512-I/SN = 512 Kbit, 1.8V Serial EEPROM, Industrial temp., SOIC package 25AA512T-I/SM = 512 Kbit, 1.8V Serial EEPROM, Industrial temp., Tape & Reel, SOIJ package 25AA512T-I/MF = 512 Kbit, 1.8V Serial EEPROM, Industrial temp., Tape & Reel, DFN package ...
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... NOTES: DS22021F-page 34 2010 Microchip Technology Inc. ...
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... PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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