AT28C64B-15PU Atmel, AT28C64B-15PU Datasheet - Page 3
![IC EEPROM 64KBIT 150NS 28DIP](/photos/7/21/72189/453-28-dip_sml.jpg)
AT28C64B-15PU
Manufacturer Part Number
AT28C64B-15PU
Description
IC EEPROM 64KBIT 150NS 28DIP
Manufacturer
Atmel
Datasheets
1.AT28C64B-15PU.pdf
(18 pages)
2.AT28C64B-15PU.pdf
(9 pages)
3.AT28C64B-15PU.pdf
(19 pages)
Specifications of AT28C64B-15PU
Format - Memory
EEPROMs - Parallel
Memory Type
EEPROM
Memory Size
64K (8K x 8)
Speed
150ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.600", 15.24mm)
Organization
8 K x 8
Interface Type
Parallel
Access Time
150 ns
Output Enable Access Time
70 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Current
40 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
5 V
Capacitance, Input
4 pF
Capacitance, Output
8 pF
Current, Input, Leakage
10 μA
Current, Operating
40 mA
Current, Output, Leakage
10
Data Retention
10 yrs.
Density
64K
Package Type
PDIP
Power Dissipation
220 mW
Temperature, Operating
-40 to +85 °C
Time, Access
150 ns
Time, Address Hold
50
Voltage, Input, High
2 V
Voltage, Input, Low
0.8 V
Voltage, Output, High
2.4 V
Voltage, Output, Low
0.4 V
Voltage, Supply
5 V
Memory Configuration
8K X 8
Supply Voltage Range
4.5V To 5.5V
Memory Case Style
DIP
No. Of Pins
28
Rohs Compliant
Yes
Operating Temperature Range
-40°C
Ic Interface Type
Parallel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT28C64B-15PU
Manufacturer:
ATMEL
Quantity:
218 400
9. AC Read Characteristics
10. AC Read Waveforms
Notes:
6
Symbol
t
t
t
t
t
ACC
CE
OE
DF
OH
(1)
(3)(4)
(2)
1. CE may be delayed up to t
2. OE may be delayed up to t
3. t
4. This parameter is characterized and is not 100% tested.
AT28C64B
without impact on t
DF
is specified from OE or CE whichever occurs first (C
Parameter
Address to Output Delay
CE to Output Delay
OE to Output Delay
CE or OE to Output Float
Output Hold from OE, CE or Address, whichever
occurred first
ADDRESS
OUTPUT
CE
ACC
OE
.
ACC
CE
(1)(2)(3)(4)
- t
- t
OE
CE
after the falling edge of CE without impact on t
after the address transition without impact on t
HIGH Z
ADDRESS VALID
t
ACC
t
CE
t
OE
L
= 5 pF).
OUTPUT VALID
t
Min
OH
0
0
0
t
CE
AT28C64B-15
DF
ACC
or by t
.
ACC
- t
Max
150
150
OE
70
50
after an address change
Units
ns
ns
ns
ns
ns