NC7SZ11L6X_Q Fairchild Semiconductor, NC7SZ11L6X_Q Datasheet - Page 3

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NC7SZ11L6X_Q

Manufacturer Part Number
NC7SZ11L6X_Q
Description
Logic Gates 3-Input AND Gate
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of NC7SZ11L6X_Q

Product Category
Logic Gates
Product
AND
Logic Family
NC7SV
Number Of Gates
1
Number Of Lines (input / Output)
3 / 1
High Level Output Current
- 32 mA
Low Level Output Current
32 mA
Propagation Delay Time
8.5 ns, 7.5 ns
Supply Voltage - Max
5.5 V
Supply Voltage - Min
1.65 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
MicroPak-6
Minimum Operating Temperature
- 40 C
Number Of Input Lines
3
Number Of Output Lines
1
t
t
t
t
C
C
PLH
PHL
PLH
PHL
Symbol
AC Electrical Characteristics
Note 3: CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (I
loading and operating at 50% duty cycle. (See Figure 2.) C
I
AC Loading and Waveforms
C
Input PRR
Input
PRR
IN
PD
CCD
L
includes load and stray capacitance
,
,
(C
10 MHz; Duty Cycle
Ac Waveform; t
PD
Propagation Delay
Propagation Delay
Input Capacitance
Power Dissipation Capacitance
) (V
1.0 MHz, t
CC
) (f
FIGURE 2. I
FIGURE 1. AC Test Circuit
IN
Parameter
)
r
w
(I
t
f
500 ns
CC
1.8 ns;
50%
static)
CCD
Test Circuit
1.8
2.5
3.3
5.0
3.3
5.0
V
(V)
3.3
5.0
0
CC
0.15
0.2
0.3
0.5
0.3
0.5
PD
is related to I
Min
2.0
0.8
0.5
0.5
1.5
0.8
T
A
CCD
Typ
9.0
4.9
3.5
2.5
4.1
2.9
20
25
4
25 C
3
dynamic operating current by the expression:
Max
18.5
10.5
8.5
6.5
8.5
7.5
T
A
Min
2.0
0.8
0.5
0.5
1.5
0.8
FIGURE 3. AC Waveforms
40 C to 85 C
Max
19.0
11.0
9.0
7.0
9.0
8.0
Units
pF
pF
ns
ns
www.fairchildsemi.com
C
R
C
R
(Note 3)
Conditions
L
L
L
L
15 pF,
1 M
50 pF,
500
CCD
) at no output
Number
Figure 2
Figures
Figures
Figure
1, 3
1, 3

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