HCF4012BM1 STMicroelectronics, HCF4012BM1 Datasheet
HCF4012BM1
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HCF4012BM1 Summary of contents
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... PIN CONNECTION September 2001 DUAL 4 INPUT NAND GATE = 25°C ORDER CODES A PACKAGE DIP SOP implementation of the NAND function and supplement the existing family of CMOS gates. All inputs and outputs are buffered. Semiconductor with direct HCF4012B DIP SOP TUBE T & R HCF4012BEY HCF4012BM1 HCF4012M013TR 1/7 ...
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HCF4012B INPUT EQUIVALENT CIRCUIT LOGIC DIAGRAM ABSOLUTE MAXIMUM RATINGS Symbol V Supply Voltage Input Voltage Input Current I P Power Dissipation per Package D Power Dissipation per Output Transistor T Operating Temperature op T ...
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DC SPECIFICATIONS Symbol Parameter V (V) I Quiescent Current 0/5 L 0/10 0/15 0/20 V High Level Output 0/5 OH Voltage 0/10 0/15 V Low Level Output 5/0 OL Voltage 10/0 15/0 V High Level Input IH Voltage V Low ...
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HCF4012B TEST CIRCUIT C = 50pF or equivalent (includes jig and probe capacitance 200K pulse generator (typically OUT WAVEFORM : PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle) 4/7 ...
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Plastic DIP-14 MECHANICAL DATA mm. DIM. MIN. TYP a1 0.51 B 1.39 b 0 8.5 e 2.54 e3 15. 3.3 Z 1.27 inch MAX. MIN. TYP. 0.020 1.65 0.055 0.020 0.010 20 0.335 ...
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HCF4012B DIM. MIN 0 0. 8. 3.8 G 4 6/7 SO-14 MECHANICAL DATA mm. TYP MAX. 1.75 0.2 1.65 0.46 0.25 0.5 ...
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... No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied ...