MAX3318EAP+ Maxim Integrated, MAX3318EAP+ Datasheet - Page 13

• Manufacturer Part Number: MAX3318EAP+
• Description: RS-232 Interface IC
• Manufacturer: Maxim Integrated
• Series: MAX3316, MAX3317, MAX3318, MAX3319r

Specifications of MAX3318EAP+

• Data Rate: 460 Kbps
• Operating Supply Voltage: 2.5 V
• Supply Current: 1 mA
• Operating Temperature Range: 0 C to + 70 C
• Function: Transceiver
• Number Of Drivers: 2
• Number Of I/os: 8
• Number Of Receivers: 2
• Propagation Delay Time Ns: 0.175 us
• Shutdown: Yes

The MAX6741/MAX6744 offer a V
for V
long as V
exceeds V
open-drain POK1 output is deasserted. The POK1 output
can then enable the V
POK1 pullup resistor). RESET is deasserted when both
V
for the reset timeout period (t
be used for I/O before core or core before I/O sequenc-
ing, depending on the selected V
See the Typical Application Circuit and Figure 1.
The power-fail comparator can be used to monitor a
negative supply voltage using the circuit shown in
Figure 4. When the negative supply is valid, PFO is low.
When the negative supply voltage drops, PFO goes
high. The circuit’s accuracy is affected by the PFI
threshold tolerance, V
CC
1 and V
CC
1-to-V
CC
TH
CC
1 is below its V
1 for the POK1 timeout period (t
CC
2 remain above their selected thresholds
Monitoring a Negative Voltage
2 sequencing. POK1 remains low as
______________________________________________________________________________________
Low-Power Dual-/Triple-Voltage SC70 µP
CC
CC
RSTIN/PFI
2 power supply (use an external
, R1, and R2.
V
V
CC
CC
2
1
TH
RP
1 threshold. When V
). The POK1 output can
CC
CC
1 POK (POK1) ideal
1/V
CC
0.488V
2 thresholds.
POKP
V
CC
), the
1
CC
1.23V
1
The MAX6736–MAX6745 supervisors are relatively
immune to short-duration falling V
es). It is usually undesirable to reset the µP when V
experiences only small glitches. The Typical Operating
Characteristics show Maximum V
Duration vs. Reset Threshold Overdrive, for which reset
pulses are not generated. The graph shows the maxi-
mum pulse width that a falling V
cally have without causing a reset pulse to be issued.
As the amplitude of the transient increases, the maxi-
mum allowable pulse width decreases. A 0.1µF bypass
capacitor mounted close to the V
tional transient immunity.
TRANSISTOR COUNT: 249
PROCESS: BiCMOS
TIMEOUT
PERIOD
RESET
DELAY
Supervisory Circuits
MR
MAX6736–
MAX6745
V
CC
1
V
PULLUP
CC
MR
OUTPUT
1
RESET
V
CC
2
Functional Diagram
Chip Information
PFO
RESET
POK1
Transient Immunity
CC
CC
CC
CC
transient might typi-
pin provides addi-
1/V
transients (glitch-
CC
2 Transient
CC
13