MAX5168NCCM Maxim Integrated, MAX5168NCCM Datasheet - Page 11

• Manufacturer Part Number: MAX5168NCCM
• Description: Sample & Hold Amplifiers
• Manufacturer: Maxim Integrated
• Series: MAX5168r

Specifications of MAX5168NCCM

• Number Of Channels: 32
• Acquisition Time: 4 us
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Package / Case: TQFP-48
• Minimum Dual Supply Voltage: - 4.75 V, + 9.5 V

The MAX5175/MAX5177 accept one 16-bit packet or
two 8-bit packets sent while CS remains low. The
devices allow the following to be configured:
Specific commands for setting these are shown in
Table 1.
Table 1. Serial-Interface Programming Commands
Figure 2. Connections for SPI/QSPI Standards
Clock edge on which serial data output (DOUT) is
clocked out
State of the user-programmable logic output
Reset state.
C1
0
0
1
1
1
1
1
1
1
MAX5175
MAX5177
C0
0
1
0
1
1
1
1
1
1
16-BIT SERIAL WORD
SCLK
DIN
______________________________________________________________________________________
CS
D11..................D0
1 0 0 x xxxx xxxx
1 0 1 x xxxx xxxx
1 1 0 x xxxx xxxx
1 1 1 x xxxx xxxx
0 0 x x xxxx xxxx
0 1 x x xxxx xxxx
12-bit DAC data
12-bit DAC data
xxxx xxxx xxxx
Low-Power, Serial, 12-Bit DACs with
CPOL = 0, CPHA = 0
MOSI
SCK
I/O
MICROWIRE
PORT
S1, S0
+5V
00
00
SS
xx
xx
xx
xx
xx
xx
xx
Force/Sense Voltage Output
Load input register; DAC registers are unchanged.
Load input register; DAC registers are updated (start up DAC with
new data).
Update DAC register from input register (start up DAC with data
previously stored in the input registers).
No operation (NOP).
Shut down DAC (provided PDL = 1).
UPO goes low (default).
UPO goes high.
Mode 1, DOUT clocked out on SCLK’s rising edge.
Mode 0, DOUT clocked out on SCLK’s falling edge (default).
The general timing diagram in Figure 4 illustrates how
the MAX5175/MAX5177 acquire data. CS must go low
at least t
(SCLK). With CS low, data is clocked into the register
on the rising edge of SCLK. The maximum serial clock
frequency guaranteed for proper operation is 10MHz
for the MAX5175 and 6MHz for the MAX5177. See
Figure 5 for a detailed timing diagram of the serial inter-
face.
Figure 3. Connections for MICROWIRE
MAX5175
MAX5177
CSS
before the rising edge of the serial clock
SCLK
DIN
CS
FUNCTION
CPOL = 0, CPHA = 0
SK
SO
I/O
SPI/QSPI
PORT
11