74VHCT08AM_Q Fairchild Semiconductor, 74VHCT08AM_Q Datasheet

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74VHCT08AM_Q

Manufacturer Part Number
74VHCT08AM_Q
Description
Logic Gates Qd 2-Input AND Gate
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of 74VHCT08AM_Q

Product
AND
Logic Family
74VHCT
Number Of Gates
4
Number Of Lines (input / Output)
2 / 1
High Level Output Current
- 8 mA
Low Level Output Current
8 mA
Propagation Delay Time
7.9 ns
Supply Voltage - Max
5.5 V
Supply Voltage - Min
4.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SOIC-14
Minimum Operating Temperature
- 40 C
Number Of Input Lines
2
Number Of Output Lines
1
©1997 Fairchild Semiconductor Corporation
74VHCT08A Rev. 1.3.0
74VHCT08A
Quad 2-Input AND Gate
Features
Ordering Information
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
74VHCT08AM
74VHCT08ASJ
74VHCT08AMTC
74HCT08AN
Order Number
High speed: t
High noise immunity: V
Power down protection is provided on all inputs and
outputs
Low noise: V
Low power dissipation: I
Pin and function compatible with 74HCT08
All packages are lead free per JEDEC: J-STD-020B standard.
OLP
PD
5.0ns (typ.) at T
0.8V (max.)
IH
Package
Number
CC
MTC14
M14D
M14A
N14A
2.0V, V
2µA (max.) @ T
A
IL
25°C
0.8V
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150"
Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
A
25°C
General Description
The VHCT08A is an advanced high speed CMOS 2
Input AND Gate fabricated with silicon gate CMOS tech-
nology. It achieves the high-speed operation similar to
equivalent Bipolar Schottky TTL while maintaining the
CMOS low power dissipation.
The internal circuit is composed of 4 stages including
buffer output, which provide high noise immunity and
stable output.
Protection circuits ensure that 0V to 7V can be applied to
the input pins without regard to the supply voltage and to
the output pins with V
device destruction due to mismatched supply and input/
output voltages. This device can be used to interface 3V
to 5V systems and two supply systems such as battery
backup.
Package Description
CC
0V. These circuits prevent
February 2008
www.fairchildsemi.com

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74VHCT08AM_Q Summary of contents

Page 1

... N14A Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. ©1997 Fairchild Semiconductor Corporation 74VHCT08A Rev. 1.3.0 General Description 25°C The VHCT08A is an advanced high speed CMOS 2 ...

Page 2

... Connection Diagram Pin Description Pin Names Description Inputs Outputs n ©1997 Fairchild Semiconductor Corporation 74VHCT08A Rev. 1.3.0 Logic Symbol IEEE/IEC Truth Table www.fairchildsemi.com ...

Page 3

... CC T Operating Temperature OPR Input Rise and Fall Time Note: 1. Unused inputs must be held HIGH or LOW. They may not float. ©1997 Fairchild Semiconductor Corporation 74VHCT08A Rev. 1.3.0 Parameter absolute maximum rating must be observed OUT GND (Outputs Active) OUT OUT CC ...

Page 4

... V Quiet Output Minimum OLV Dynamic V OL (2) V Minimum HIGH Level IHD Dynamic Input Voltage (2) V Maximum LOW Level ILD Dynamic Input Voltage Note: 2. Parameter guaranteed by design. ©1997 Fairchild Semiconductor Corporation 74VHCT08A Rev. 1.3.0 V (V) Conditions CC 4.5 5.5 4.5 5.5 4 –50µ – ...

Page 5

... PD current consumption without load. Average operating current can be obtained from the equation: I (opr.) C • V • ©1997 Fairchild Semiconductor Corporation 74VHCT08A Rev. 1.3.0 V (V) Conditions Min CC 5.0 ± 0.5 C 15pF L C 50pF L V ...

Page 6

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...

Page 7

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...

Page 8

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...

Page 9

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...

Page 10

... TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended exhaustive list of all such trademarks. ® ACEx Build it Now™ CorePLUS™ CROSSVOLT™ CTL™ Current Transfer Logic™ ...

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