CAT1641WI-25-T3 ON Semiconductor, CAT1641WI-25-T3 Datasheet - Page 5

• Manufacturer Part Number: CAT1641WI-25-T3
• Description: Supervisory Circuits CPU w/64K
• Manufacturer: ON Semiconductor

Specifications of CAT1641WI-25-T3

• Product Category: Supervisory Circuits
• Rohs: yes
• Number Of Voltages Monitored: 1
• Monitored Voltage: 3 V, 3.3 V, 5 V
• Undervoltage Threshold: 2.55 V
• Overvoltage Threshold: 2.7 V
• Output Type: Active High, Open Drain
• Manual Reset: Resettable
• Watchdog: No Watchdog
• Battery Backup Switching: No Backup
• Power-up Reset Delay (typ): 270 ms
• Supply Voltage - Max: 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC-8 Wide
• Chip Enable Signals: No
• Maximum Power Dissipation: 1000 mW
• Minimum Operating Temperature: - 40 C
• Power Fail Detection: No
• Supply Current (typ): 3000 uA
• Supply Voltage - Min: 3 V

1. This parameter is characterized initially and after a design or process change that affects the parameter. Not 100% tested.
2. Test Conditions according to “AC Test Conditions” table.
3. The write cycle time is the time from a valid stop condition of a write sequence to the end of the internal program/erase cycle. During the
Table 6. CAPACITANCE
T
Table 7. AC CHARACTERISTICS
V
Memory Read & Write Cycle (Note 2)
C
A
write cycle, the bus interface circuits are disabled, SDA is allowed to remain high and the device does not respond to its slave address.
CC
t
t
C
BUF
OUT
WC
t
t
= 25°C, f = 1.0 MHz, V
R
F
IN
Symbol
Symbol
t
t
t
t
t
= 3.0 V to 5.5 V and over the recommended temperature conditions, unless otherwise specified.
HD; DAT
SU; STO
HD; STA
SU; STA
SU; DAT
(Note 1)
(Note 1)
t
t
f
(Note 1)
HIGH
(Note 3)
LOW
t
(Note 1)
SCL
t
t
(Note 1)
SP
AA
DH
Output Capacitance
Input Capacitance
Clock Frequency
Input Filter Spike Suppression (SDA, SCL)
Clock Low Period
Clock High Period
SDA and SCL Rise Time
SDA and SCL Fall Time
Start Condition Hold Time
Start Condition Setup Time (for a Repeated Start)
Data Input Hold Time
Data Input Setup Time
Stop Condition Setup Time
SCL Low to Data Out Valid
Data Out Hold Time
Time the Bus must be Free Before a New Transmission Can Start
Write Cycle Time (Byte or Page)
CC
= 5 V
Test
Parameter
http://onsemi.com
5
V
V
OUT
IN
= 0 V
Test Conditions
= 0 V
Min
100
1.3
0.6
0.6
0.6
0.6
1.3
50
0
Max
Max
400
100
300
300
900
8
6
5
Units
Units
kHz
ms
pF
pF
ns
ns
ns
ns
ns
ns
ns
ms
ms
ms
ms
ms
ms