70T3339S200BC IDT, 70T3339S200BC Datasheet - Page 19

• Manufacturer Part Number: 70T3339S200BC
• Description: SRAM
• Manufacturer: IDT

Specifications of 70T3339S200BC

• Part # Aliases: IDT70T3339S200BC

Truth Table III — Interrupt Flag
Waveform of Interrupt Timing
NOTES:
1. INT
2. CE
3. A18
4. A18
5. Address is for internal register, not the external bus, i.e., address needs to be qualified by one of the Address counter control signals.
NOTES:
1. CE
2. All timing is the same for Left and Right ports.
3. Address is for internal register, not the external bus, i.e., address needs to be qualified by one of the Address counter control signals.
IDT70T3339/19/99S
High-Speed 2.5V 512/256/128K x 18 Dual-Port Static RAM
CLK
ADDRESS
ADDRESS
↑
↑
↑
↑
0 =
0 =
L
X
X
L
and INT
is a NC for IDT70T3319, therefore Interrupt Addresses are 3FFFF and 3FFFE.
and A17
V
V
INT
IL
CE
R/W
IL
CE
CLK
CLK
R/W
and CE
and CE
R
R
L
L
R
R/W
(3)
(1)
(1)
R
R
(3)
L
L
R
X
X
H
X
L
must be initialized at power-up by Resetting the flags.
L
are NC's for IDT70T3399, therefore Interrupt Addresses are 1FFFF and 1FFFE.
(2)
1 =
1 =
V
V
IH
IH
. R/W and CE are synchronous with respect to the clock and need valid set-up and hold times.
Left Port
CE
X
X
L
L
t
t
t
L
7FFFF
SW
SA
SC
(2)
t
t
t
HA
HC
HW
A
18L
7FFFF
7FFFE
-A
X
X
t
0L
INS
(3,4,5)
INT
X
X
H
L
L
CLK
(2)
↑
↑
↑
↑
R
(1)
t
SC
t
SW
t
7FFFF
SA
R/W
6.42
19
X
X
H
L
R
t
t
t
HC
(2)
HW
HA
t
INR
Right Port
CE
X
X
L
L
R
(2)
A
18R
Industrial and Commercial Temperature Ranges
7FFFF
7FFFE
-A
X
X
0R
(3,4,5)
INT
X
X
L
H
R
Set Right INT
Reset Right INT
Set Left INT
Reset Left INT
L
Function
R
Flag
L
Flag
R
Flag
5652 drw 19
Flag
5652 tbl 12