MAX6896PAZT+T Maxim Integrated, MAX6896PAZT+T Datasheet - Page 2
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MAX6896PAZT+T
Manufacturer Part Number
MAX6896PAZT+T
Description
Supervisory Circuits Adjustable Sequencer/Supervisor
Manufacturer
Maxim Integrated
Series
MAX6895, MAX6896, MAX6897, MAX6898, MAX6899r
Datasheet
1.MAX6896PAZTT.pdf
(15 pages)
Specifications of MAX6896PAZT+T
Rohs
yes
Number Of Voltages Monitored
1
Output Type
Active Low, Push-Pull
Manual Reset
Not Resettable
Watchdog
No Watchdog
Battery Backup Switching
No Backup
Supply Voltage - Max
5.5 V
Chip Enable Signals
Yes
Maximum Power Dissipation
167.7 mW
Power Fail Detection
No
Supply Current (typ)
10 uA
Supply Voltage - Min
1.5 V
ABSOLUTE MAXIMUM RATINGS
OUT, OUT (push-pull) ................................-0.3V to (V
OUT, OUT (open-drain)..........................................-0.3V to +30V
CDELAY......................................................-0.3V to (V
Output Current (all pins) ...................................................±20mA
Continuous Power Dissipation (T
PACKAGE THERMAL CHARACTERISTICS (Note 1)
µDFN
Ultra-Small, Adjustable
Sequencing/Supervisory Circuits
ELECTRICAL CHARACTERISTICS
(V
otherwise noted.) (Note 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four
2
SUPPLY
Operating Voltage Range
Undervoltage Lockout (Note 3)
V
IN
Threshold Voltage
Hysteresis
Input Current (Note 4)
CDELAY
Delay Charge Current
Delay Threshold
CDELAY Pulldown Resistance
ENABLE/ENABLE
Input Low Voltage
Input High Voltage
Input Leakage Current
V
Junction-to-Ambient Thermal Resistance (θ
Junction-to-Case Thermal Resistance (θ
CC
6-Pin Thin SOT23 (derate 9.1mW/°C above +70°C) ...727.3mW
CC
CC
6-Pin µDFN (derate 2.1mW/°C above +70°C)...........167.7mW
_______________________________________________________________________________________
, ENABLE, ENABLE, IN....................................-0.3V to +6V
Supply Current
= 1.5V to 5.5V, T
layer board. For detailed information on package thermal considerations refer to www.maxim-ic.com/thermal-tutorial.
PARAMETER
A
= -40°C to +125°C, unless otherwise specified. Typical values are at V
A
= +70°C)
SYMBOL
R
V
JC
UVLO
CDELAY
I
V
V
LEAK
V
I
HYST
I
V
V
I
TCD
CC
CD
)......................122°C/W
CC
IN
TH
IH
IL
JA
)...............477°C/W
V
V
V
V
V
CDELAY rising
ENABLE, ENABLE = V
CC
CC
IN
IN
IN
CC
CC
rising, 1.5V < V
falling
= 0V or V
falling
= 3.3V, no load
+ 0.3V)
+ 0.3V)
CC
CONDITIONS
CC
Operating Temperature Range .........................-40°C to +125°C
Storage Temperature Range .............................-65°C to +150°C
Junction Temperature ......................................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
Thin SOT23
Junction-to-Ambient Thermal Resistance (θ
Junction-to-Case Thermal Resistance (θ
CC
< 5.5V
or GND
0.491
-100
MIN
1.20
0.95
CC
200
1.5
-15
1.4
= 3.3V and T
TYP
1.00
250
130
0.5
10
5
JC
).......................50°C/W
JA
)................110°C/W
A
0.509
+100
MAX
1.35
1.05
+15
300
500
= +25°C, unless
5.5
0.4
20
UNITS
mV
µA
nA
nA
nA
Ω
V
V
V
V
V
V