M95020-RMB6TG STMicroelectronics, M95020-RMB6TG Datasheet - Page 16

• Manufacturer Part Number: M95020-RMB6TG
• Description: IC EEPROM 2KBIT 5MHZ 8UFDFPN
• Manufacturer: STMicroelectronics

Specifications of M95020-RMB6TG

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 2K (256 x 8)
• Speed: 5MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-MLP, 8-UFDFPN
• Memory Configuration: 256 X 8
• Interface Type: Serial, SPI
• Clock Frequency: 5MHz
• Supply Voltage Range: 1.8V To 5.5V
• Memory Case Style: DFN
• No. Of Pins: 8
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-8709-2; M95020-RMB6TG

Instructions
6
6.1
16/43
Instructions
Each instruction starts with a single-byte code, as summarized in
If an invalid instruction is sent (one not contained in
deselects itself.
Table 4.
1. X = Don’t Care.
2. A8 = 1 for the upper half of the memory array of the M95040, and 0 for the lower half, and is Don’t Care for
Write Enable (WREN)
The Write Enable Latch (WEL) bit must be set prior to each WRITE and WRSR instruction.
The only way to do this is to send a Write Enable instruction to the device.
As shown in
and the bits of the instruction byte are shifted in, on Serial Data Input (D). The device then
enters a wait state. It waits for a the device to be deselected, by Chip Select (S) being driven
high.
Figure 7.
WREN
WRDI
RDSR
WRSR
READ
WRITE
other devices.
Instruction
Instruction set
Figure
Write Enable (WREN) sequence
S
C
D
Q
7, to send this instruction to the device, Chip Select (S) is driven low,
Write Enable
Write Disable
Read Status Register
Write Status Register
Read from Memory Array
Write to Memory Array
Doc ID 6512 Rev 8
Description
High Impedance
0
1
2
Instruction
3
4
5
Table
6
7
4), the device automatically
M95040, M95020, M95010
AI01441D
Table
Instruction Format
0000 A
0000 A
0000 X110
0000 X100
0000 X101
0000 X001
4.
8
8
011
010
(1)
(1)
(1)
(1)
(2)
(2)