M24C32-WDW6TP STMicroelectronics, M24C32-WDW6TP Datasheet - Page 6

IC EEPROM 32KBIT 400KHZ 8TSSOP

M24C32-WDW6TP

Manufacturer Part Number
M24C32-WDW6TP
Description
IC EEPROM 32KBIT 400KHZ 8TSSOP
Manufacturer
STMicroelectronics
Datasheets

Specifications of M24C32-WDW6TP

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
32K (4K x 8)
Speed
400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-TSSOP
Density
32Kb
Interface Type
Serial (I2C)
Organization
4Kx8
Access Time (max)
900ns
Frequency (max)
400KHz
Write Protection
Yes
Data Retention
40Year
Operating Supply Voltage (typ)
3.3/5V
Package Type
TSSOP
Operating Temp Range
-40C to 85C
Supply Current
5mA
Operating Supply Voltage (min)
2.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
8
Maximum Clock Frequency
0.4 MHz
Access Time
900 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.5 V
Maximum Operating Current
2 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
2.5 V, 5.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-8645-2
M24C32-WDW6TP

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Description
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Description
M24C32-x and M24C32-DF devices are I2C-compatible electrically erasable programmable
memories (EEPROM). They are organized as 8192 × 8 bits.
The M24C32-D also offers an additional page, named the Identification Page (32 bytes)
which can be written and (later) permanently locked in Read-only mode. This Identification
Page offers flexibility in the application board production line, as it can be used to store
unique identification parameters and/or parameters specific to the production line.
Figure 1.
The device behaves as a slave in the I2C-bus protocol, with all memory operations
synchronized by the serial clock. Read and Write operations are initiated by a Start
condition, generated by the bus master. The Start condition is followed by a Device Select
code and Read/Write bit (RW) (as described in
Inside this Device Select code, the 4-bit device type identifier code is (1010) for the M24C32
and (1011) for the M24C32-D.
When writing data to the memory, the device inserts an acknowledge bit during the 9
time, following the bus master’s 8-bit transmission. When data is read by the bus master, the
bus master acknowledges the receipt of the data byte in the same way. Data transfers are
terminated by a Stop condition after an Ack for Write, and after a NoAck for Read.
Logic diagram
Doc ID 4578 Rev 18
M24C32-DF, M24C32-W, M24C32-R, M24C32-F
Table
4), terminated by an acknowledge bit.
th
bit

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