M95160-RMB6TG STMicroelectronics, M95160-RMB6TG Datasheet - Page 22

IC EEPROM 16KBIT 5MHZ 8UFDFPN

M95160-RMB6TG

Manufacturer Part Number
M95160-RMB6TG
Description
IC EEPROM 16KBIT 5MHZ 8UFDFPN
Manufacturer
STMicroelectronics
Datasheet

Specifications of M95160-RMB6TG

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
16K (2K x 8)
Speed
5MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-MLP, 8-UFDFPN
Organization
2 K x 8
Interface Type
SPI
Maximum Clock Frequency
10 MHz
Access Time
80 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Maximum Operating Current
3 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
2.5 V, 3.3 V, 5 V
Memory Configuration
2048 X 8
Clock Frequency
5MHz
Supply Voltage Range
1.8V To 5.5V
Memory Case Style
DFN
No. Of Pins
8
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-8712-2
M95160-RMB6TG

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M95160-RMB6TG
Manufacturer:
STMicroelectronics
Quantity:
45 330
Part Number:
M95160-RMB6TG
Manufacturer:
ST
Quantity:
20 000
Instructions
6.5
Figure 11. Read from Memory Array (READ) sequence
1. Depending on the memory size, as shown in
22/50
S
C
D
Q
Read from Memory Array (READ)
As shown in
low. The bits of the instruction byte and address bytes are then shifted in, on Serial Data
Input (D). The address is loaded into an internal address register, and the byte of data at
that address is shifted out, on Serial Data Output (Q).
If Chip Select (S) continues to be driven low, the internal address register is automatically
incremented, and the byte of data at the new address is shifted out.
When the highest address is reached, the address counter rolls over to zero, allowing the
Read cycle to be continued indefinitely. The whole memory can, therefore, be read with a
single READ instruction.
The Read cycle is terminated by driving Chip Select (S) high. The rising edge of the Chip
Select (S) signal can occur at any time during the cycle.
The first byte addressed can be any byte within any page.
The instruction is not accepted, and is not executed, if a Write cycle is currently in progress.
0
1
High Impedance
2
Instruction
Figure
3
4
11., to send this instruction to the device, Chip Select (S) is first driven
5
6
7
Table
MSB
15
8
Doc ID 8028 Rev 10
14 13
9 10
7., the most significant address bits are Don’t Care.
16-Bit Address
3
20 21 22 23 24 25 26 27
2
1
0
MSB
7
6
5
Data Out 1
4
3
28 29 30
2
1
M95160-x, M95080-x
31
0
7
Data Out 2
AI01793D

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