CY62128ELL-45SXI Cypress Semiconductor Corp, CY62128ELL-45SXI Datasheet - Page 5

• Manufacturer Part Number: CY62128ELL-45SXI
• Description: IC SRAM 1MBIT 45NS 32SOIC
• Manufacturer: Cypress Semiconductor Corp
• Type: Asynchronousr

Specifications of CY62128ELL-45SXI

• Memory Size: 1M (128K x 8)
• Package / Case: 32-SOIC (11.30mm Width)
• Interface: Parallel
• Format - Memory: RAM
• Memory Type: SRAM
• Speed: 45ns
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Access Time: 45 ns
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Maximum Operating Current: 16 mA
• Organization: 128 K x 8
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Ports: 1
• Operating Supply Voltage: 5 V
• Memory Configuration: 128K X 8
• Supply Voltage Range: 4.5V To 5.5V
• Memory Case Style: SOIC
• No. Of Pins: 32
• Operating Temperature Range: -40°C To +85°C
• Rohs Compliant: Yes
• Density: 1Mb
• Access Time (max): 45ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 5V
• Address Bus: 17b
• Package Type: SOIC
• Operating Temp Range: -40C to 85C
• Supply Current: 16mA
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 32
• Word Size: 8b
• Number Of Words: 128K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 428-1941-5; CY62128ELL-45SXI

Thermal Resistance
AC Test Loads and Waveform
Data Retention Characteristics
Data Retention Waveform
Notes
Notes
Document #: 38-05485 Rev. *H
V
I
t
t
10. Full device AC operation requires linear V
10. Full device AC operation requires linear V
11. CE is the logical combination of CE
11. CE is the logical combination of CE
Parameter
CCDR
CDR
R
Parameter
DR
[10]


[9]
JC
JA
[8]
OUTPUT
V
INCLUDING
CE
Thermal Resistance
(Junction to Ambient)
Thermal Resistance
(Junction to Case)
CC
V
Data Retention Current
Chip Deselect to Data
Retention Time
Operation Recovery
Time
V
Parameters
CC
JIG AND
CC
SCOPE
for Data Retention
Description
R
V
R1
R2
Description
30 pF
TH
TH
R1
[9]
1
1
and CE
and CE
CC
CC
[11]
R2
2
2
Still Air, soldered on a 3 × 4.5 inch,
two-layer printed circuit board
ramp from V
ramp from V
. When CE
. When CE
Equivalent to:
V
V
CC
IN
V
= V
> V
CC(min)
t
(Over the Operating Range)
CDR
DR
1
1
CC
DR
DR
Test Conditions
is LOW and CE
is LOW and CE
OUTPUT
, CE
to V
to V
- 0.2V or V
1
CC(min)
CC(min)
> V
Rise Time = 1 V/ns
THEVENIN
CC
> 100 s or stable at V
> 100 s or stable at V
Value
 0.2V or CE
2
2
1800
1.77
990
639
IN
DATA RETENTION MODE
is HIGH, CE is LOW; when CE
is HIGH, CE is LOW; when CE
Conditions
GND
3.0V
< 0.2V
EQUIVALENT
V
R
DR
TH
10%
2
> 2.0V
< 0.2V,
CC(min)
CC(min)
ALL INPUT PULSES
Package
V
SOIC
48.67
25.86
90%
> 100 s.
> 100 s.
Ind’l/Auto-A
1
1
Auto-E
is HIGH or CE
is HIGH or CE
Package
STSOP
32.56
3.59
V
2
2
CC(min)
90%
Min
is LOW, CE is HIGH.
is LOW, CE is HIGH.
t
t
RC
R
2
0
CY62128E MoBL
10%
Unit
Fall Time = 1 V/ns



V
Package
Typ
TSOP
33.01
3.42
[3]
Max
30
4
Page 5 of 14
C/W
C/W
Unit
Unit
A
A
ns
ns
V
®
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