CY7C1041DV33-10ZSXI Cypress Semiconductor Corp, CY7C1041DV33-10ZSXI Datasheet - Page 8
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CY7C1041DV33-10ZSXI
Manufacturer Part Number
CY7C1041DV33-10ZSXI
Description
IC SRAM 4MBIT 10NS 44TSOP
Manufacturer
Cypress Semiconductor Corp
Type
Asynchronousr
Datasheet
1.CY7C1041DV33-10ZSXI.pdf
(17 pages)
Specifications of CY7C1041DV33-10ZSXI
Memory Size
4M (256K x 16)
Package / Case
44-TSOP II
Format - Memory
RAM
Memory Type
SRAM - Asynchronous
Speed
10ns
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Access Time
10 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Current
90 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Ports
1
Operating Supply Voltage
3.3 V
Density
4Mb
Access Time (max)
10ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
3.3V
Address Bus
18b
Package Type
TSOP-II
Operating Temp Range
-40C to 85C
Supply Current
90mA
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Word Size
16b
Number Of Words
256K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
428-1921
CY7C1041DV33-10ZSXI
CY7C1041DV33-10ZSXI
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C1041DV33-10ZSXI
Manufacturer:
NXP
Quantity:
101
Part Number:
CY7C1041DV33-10ZSXI
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Part Number:
CY7C1041DV33-10ZSXIT
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Switching Waveforms
Document Number: 38-05473 Rev. *I
Notes
22. WE is HIGH for read cycle.
23. Address valid prior to or coincident with CE transition LOW.
24. Data I/O is high impedance if OE or BHE and BLE = V
25. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high impedance state.
DATA OUT
CURRENT
ADDRESS
BHE, BLE
SUPPLY
BHE, BLE
V
DATAI/O
ADDRESS
CC
OE
CE
CE
WE
HIGH IMPEDANCE
t
t
LZCE
PU
(continued)
t
SA
t
Figure 5. Read Cycle No. 2 (OE Controlled)
ACE
Figure 6. Write Cycle No. 1 (CE Controlled)
t
t
LZBE
t
DBE
LZOE
t
DOE
50%
IH.
t
AW
t
RC
t
WC
t
SCE
t
PWE
t
BW
DATA VALID
t
SD
[22, 23]
[24, 25]
t
HZOE
t
HD
t
t
t
HZCE
HZBE
HA
t
CY7C1041DV33
PD
50%
IMPEDANCE
HIGH
Page 8 of 17
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