MAX16047ETN+W Maxim Integrated, MAX16047ETN+W Datasheet - Page 50

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MAX16047ETN+W

Manufacturer Part Number
MAX16047ETN+W
Description
Supervisory Circuits 12-Channel EEPROM-Programmable System Manager with Nonvolatile Fault Registers
Manufacturer
Maxim Integrated
Series
MAX16047, MAX16049r
Datasheet

Specifications of MAX16047ETN+W

Number Of Voltages Monitored
12
Undervoltage Threshold
Adjustable
Overvoltage Threshold
Adjustable
Manual Reset
Resettable
Watchdog
Watchdog
Supply Voltage - Max
14 V
Maximum Power Dissipation
3810 mW
Supply Current (typ)
3800 uA
Supply Voltage - Min
3 V
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
The TAP controller is a finite state machine that
responds to the logic level at TMS on the rising edge of
TCK. See Figure 14 for a diagram of the finite state
machine. The possible states are described below:
Test-Logic-Reset: At power-up, the TAP controller is in
the test-logic-reset state. The instruction register con-
tains the IDCODE instruction. All system logic of the
device operates normally. This state can be reached
from any state by driving TMS high for five clock cycles.
Run-Test/Idle: The run-test/idle state is used between
scan operations or during specific tests. The instruction
register and test data registers remain idle.
Figure 14. TAP Controller State Diagram
50
1
0
______________________________________________________________________________________
TEST-LOGIC-RESET
RUN-TEST/IDLE
0
1
Controller State Machine
Test Access Port (TAP)
1
0
SELECT-DR-SCAN
1
CAPTURE-DR
UPDATE-DR
PAUSE-DR
SHIFT-DR
EXIT1-DR
EXIT2-DR
0
0
1
0
1
1
0
Select-DR-Scan: All test data registers retain their pre-
vious state. With TMS low, a rising edge of TCK moves
the controller into the capture-DR state and initiates a
scan sequence. TMS high during a rising edge on TCK
moves the controller to the select-IR-scan state.
Capture-DR: Data can be parallel-loaded into the test
data registers selected by the current instruction. If the
instruction does not call for a parallel load or the select-
ed test data register does not allow parallel loads, the
test data register remains at its current value. On the
rising edge of TCK, the controller goes to the shift-DR
state if TMS is low or it goes to the exit1-DR state if TMS
is high.
1
1
0
0
1
0
SELECT-IR-SCAN
1
CAPTURE-IR
UPDATE-IR
PAUSE-IR
EXIT1-IR
EXIT2-IR
SHIFT-IR
0
0
1
0
1
1
0
1
1
0
0

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