CY7C1354C-166AXI Cypress Semiconductor Corp, CY7C1354C-166AXI Datasheet - Page 16

• Manufacturer Part Number: CY7C1354C-166AXI
• Description: IC SRAM 9MBIT 166MHZ 100LQFP
• Manufacturer: Cypress Semiconductor Corp
• Type: Synchronousr

Specifications of CY7C1354C-166AXI

• Memory Size: 9M (256K x 36)
• Package / Case: 100-LQFP
• Format - Memory: RAM
• Memory Type: SRAM - Synchronous
• Speed: 166MHz
• Interface: Parallel
• Voltage - Supply: 3.135 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Access Time: 3.5 ns
• Maximum Clock Frequency: 166 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3.135 V
• Maximum Operating Current: 180 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Ports: 4
• Operating Supply Voltage: 3.3 V
• Density: 9Mb
• Access Time (max): 3.5ns
• Sync/async: Synchronous
• Architecture: SDR
• Clock Freq (max): 166MHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 18b
• Package Type: TQFP
• Operating Temp Range: -40C to 85C
• Supply Current: 180mA
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Word Size: 36b
• Number Of Words: 256K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 428-2119; CY7C1354C-166AXI

Scan Register Sizes
Identification Codes
Document Number: 38-05538 Rev. *L
Instruction
Bypass
ID
Boundary scan order (119-ball BGA package)
Boundary scan order (165-ball FBGA package)
EXTEST
IDCODE
SAMPLE Z
RESERVED
SAMPLE/PRELOAD
RESERVED
RESERVED
BYPASS
Instruction
Register Name
Code
000 Captures the input/output ring contents. Places the boundary scan register between the TDI and
001 Loads the ID register with the vendor ID code and places the register between TDI and TDO. This
010 Captures the input/output contents. Places the boundary scan register between TDI and TDO.
100 Captures the input/output ring contents. Places the boundary scan register between TDI and TDO.
101 Do Not Use: This instruction is reserved for future use.
011 Do Not Use: This instruction is reserved for future use.
110 Do Not Use: This instruction is reserved for future use.
111 Places the bypass register between TDI and TDO. This operation does not affect SRAM operation.
TDO. Forces all SRAM outputs to high Z state.
operation does not affect SRAM operation.
Forces all SRAM output drivers to a high Z state.
Does not affect the SRAM operation.
Bit Size (× 36)
32
69
69
3
1
Description
CY7C1354C, CY7C1356C
Bit Size (× 18)
32
69
69
3
1
Page 16 of 32
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