CAT25020VI-GT3 ON Semiconductor, CAT25020VI-GT3 Datasheet - Page 4

• Manufacturer Part Number: CAT25020VI-GT3
• Description: IC EEPROM 2KBIT 10MHZ 8SOIC
• Manufacturer: ON Semiconductor

Specifications of CAT25020VI-GT3

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 2K (256 x 8)
• Speed: 10MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 25020VI-GT3; CAT25020VI-GT3TR

Pin Description
SI: The serial data input pin accepts op−codes, addresses
and data. In SPI modes (0,0) and (1,1) input data is latched
on the rising edge of the SCK clock input.
SO: The serial data output pin is used to transfer data out of
the device. In SPI modes (0,0) and (1,1) data is shifted out
on the falling edge of the SCK clock.
SCK: The serial clock input pin accepts the clock provided
by the host and used for synchronizing communication
between host and CAT25010/20/40.
CS: The chip select input pin is used to enable/disable the
CAT25010/20/40. When CS is high, the SO output is
tri−stated (high impedance) and the device is in Standby
Mode (unless an internal write operation is in progress).
Every
CAT25010/20/40 must be preceded by a high to low transition
and concluded with a low to high transition of the CS input.
WP: The write protect input pin will allow all write
operations to the device when held high. When WP pin is
tied low all write operations are inhibited.
HOLD: The HOLD input pin is used to pause transmission
between host and CAT25010/20/40, without having to
retransmit the entire sequence at a later time. To pause,
HOLD must be taken low and to resume it must be taken
back high, with the SCK input low during both transitions.
When not used for pausing, the HOLD input should be tied
to V
Status Register
number of status and control bits.
with a write operation. This bit is automatically set to 1 during
an internal write cycle, and reset to 0 when the device is ready
to accept commands. For the host, this bit is read only.
WREN/WRDI commands. When set to 1, the device is in a
The Status Register, as shown in Table 8, contains a
The RDY (Ready) bit indicates whether the device is busy
The WEL (Write Enable Latch) bit is set/reset by the
SCK
CC
CS
SO
SI
, either directly or through a resistor.
communication
t
CNH
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session
t
SU
t
CSS
VALID
IN
between
t
t
H
WH
Figure 2. Synchronous Data Timing
host
t
WL
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t
V
and
t
t
RI
FI
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OUT
t
4
HO
Functional Description
Peripheral Interface (SPI) bus protocol, modes (0,0) and
(1,1). The device contains an 8−bit instruction register. The
instruction set and associated op−codes are listed in Table 7.
accomplished by simply providing the READ command and
an address. Writing to the CAT25010/20/40, in addition to
a WRITE command, address and data, also requires
enabling the device for writing by first setting certain bits in
a Status Register, as will be explained later.
CAT25010/20/40 will accept any one of the six instruction
op−codes listed in Table 7 and will ignore all other possible
8−bit combinations. The communication protocol follows
the timing from Figure 2.
Write Enable state and when set to 0, the device is in a Write
Disable state.
blocks are currently write protected. They are set by the user
with the WRSR command and are non−volatile. The user is
allowed to protect a quarter, one half or the entire memory,
by setting these bits according to Table 9. The protected
blocks then become read−only.
Table 7. INSTRUCTION SET
9. X = 0 for CAT25010, CAT25020. X = A8 for CAT25040
The CAT25010/20/40 devices support the Serial
Reading data stored in the CAT25010/20/40 is
After a high to low transition on the CS input pin, the
The BP0 and BP1 (Block Protect) bits determine which
Instruction
WRITE
WREN
WRSR
RDSR
t
WRDI
READ
CSH
t
V
0000 0100
0000 0101
0000 0001
0000 X011
0000 X010
0000 0110
Opcode
t
DIS
t
CS
(Note 9)
t
CNS
Enable Write Operations
Disable Write Operations
Read Status Register
Write Status Register
Read Data from Memory
Write Data to Memory
Operation
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