MAX792SC/D Maxim Integrated, MAX792SC/D Datasheet - Page 14

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MAX792SC/D

Manufacturer Part Number
MAX792SC/D
Description
Supervisory Circuits
Manufacturer
Maxim Integrated
Series
MAX792, MAX792L, MAX792M, MAX792R, MAX792S, MAX792T, MAX820, MAX820L, MAX820M, MAX820R, MAX820S, MAX820Tr
Datasheet

Specifications of MAX792SC/D

Number Of Voltages Monitored
1
Monitored Voltage
2.75 V to 5.5 V
Undervoltage Threshold
2.85 V
Overvoltage Threshold
3 V
Output Type
Active High, Active Low, Push-Pull
Manual Reset
Resettable
Watchdog
Watchdog
Battery Backup Switching
No Backup
Power-up Reset Delay (typ)
280 ms
Supply Voltage - Max
5.5 V
Maximum Operating Temperature
+ 70 C
Package / Case
Die
Chip Enable Signals
Yes
Minimum Operating Temperature
0 C
Power Fail Detection
Yes
Supply Current (typ)
150 uA
Supply Voltage - Min
2.75 V
Microprocessor and Nonvolatile
Memory Supervisory Circuits
Figure 11. Alternate CE Gating
Using memory devices with both CE and CE inputs
allows the MAX792/MAX820 CE propagation delay
to be bypassed. To do this, connect CE IN to ground,
pull up CE OUT to V
input of each memory device (Figure 11). The CE input
of each memory device then connects directly to the
chip-select logic, which does not have to be gated by
the MAX792/MAX820.
µPs with bidirectional reset pins, such as the Motorola
68HC11 series, can contend with the MAX792/MAX820
RESET output. If, for example, the MAX792/MAX820 RESET
output is asserted high and the µP wants to pull it low,
indeterminate logic levels may result. To avoid this,
connect a 4.7kΩ resistor between the MAX792/MAX820
RESET output and the µP reset I/O, as in Figure 12.
Buffer the MAX792/MAX820 RESET output to other sys-
tem components.
While issuing resets to the µP during power-up, power-
down, and brownout conditions, these supervisors are
relatively immune to short-duration negative-going V
transients (glitches). It is usually undesirable to reset
the µP when V
Figure 13 shows maximum transient duration vs. reset-
comparator overdrive, for which reset pulses are not
generated. The graph was produced using negative-
14
*
MAXIMUM R
THE NUMBER OF RAMS.
MINIMUM R
______________________________________________________________________________________
Interfacing to µPs with Bidirectional
P
P
14
VALUE IS 1kΩ
VALUE DEPENDS ON
CE IN
CC
Negative-Going V
Alternative Chip-Enable Gating
MAX792
MAX820
experiences only small glitches.
GND
+5V
V
CC
3
CC
12
CE OUT
, and connect CE OUT to the CE
R
P
*
13
LINES FROM LOGIC
ACTIVE-HIGH CE
CE
CE
CE
CE
CE
CE
CE
CE
CC
Reset Inputs
Transients
RAM 1
RAM 2
RAM 3
RAM 4
CC
going V
reset threshold by the magnitude indicated (reset-
comparator overdrive). The graph shows the maximum
pulse width a negative-going V
cally have without causing a reset pulse to be issued.
As the amplitude of the transient increases (i.e., goes
farther below the reset threshold), the maximum allow-
able pulse width decreases. Typically, a V
that goes 100mV below the reset threshold and lasts for
30µs or less will not cause a reset pulse to be issued.
A 100nF bypass capacitor mounted close to the V
pin provides additional transient immunity.
Figure 12. Interfacing to µPs with Bidirectional RESET Pins
Figure 13. Maximum Transient Duration Without Causing a
Reset Pulse vs. Reset-Comparator Overdrive
V
CC
CC
MAX792
MAX820
100
GND
80
60
40
20
V
pulses, starting at 5V and ending below the
0
CC
RESET COMPARATOR OVERDRIVE, (V
3
12
RESET
10
1
100
4.7k
RESET
CC
1000
BUFFER
T
transient may typi-
GND
V
A
V
µP
CC
CC
= +25°C
TH
= 5V
- V
10,000
CC
CC
) (mV)
TO OTHER
SYSTEM RESET
INPUTS
transient
CC

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