MAX6389XS22D3+T Maxim Integrated, MAX6389XS22D3+T Datasheet - Page 7

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MAX6389XS22D3+T

Manufacturer Part Number
MAX6389XS22D3+T
Description
Supervisory Circuits
Manufacturer
Maxim Integrated
Series
MAX6381, MAX6382, MAX6383, MAX6384, MAX6385, MAX6386, MAX6387, MAX6388, MAX6389, MAX6390r
Datasheet

Specifications of MAX6389XS22D3+T

Number Of Voltages Monitored
2
Monitored Voltage
1.8 V to 5 V
Undervoltage Threshold
2.13 V, Adjustable
Overvoltage Threshold
2.24 V, Adjustable
Output Type
Active Low, Open Drain
Manual Reset
Not Resettable
Watchdog
No Watchdog
Battery Backup Switching
No Backup
Power-up Reset Delay (typ)
280 ms
Supply Voltage - Max
5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SC-70
Chip Enable Signals
No
Maximum Power Dissipation
245 mW
Minimum Operating Temperature
- 40 C
Power Fail Detection
No
Supply Current (typ)
7 uA
Supply Voltage - Min
1 V
a small-signal diode (D1) as shown in Figure 1. If the
analog signal can dip below GND, add D2. Adding
protection diodes reduces the analog range to a diode
drop (about 0.7V) below V+ (for D1), and a diode drop
above ground (for D2). On-resistance increases slightly
at low supply voltages. Maximum supply voltage (V+)
must not exceed +6V.
Adding protection diode D2 causes the logic threshold
to be shifted relative to GND. TTL compatibility is not
guaranteed when D2 is added.
Figure 2. Switching Time
Figure 3a. Break-Before-Make Interval (MAX4624 only)
MAX4624
MAX4624
MAX4625
LOGIC
INPUT
LOGIC
INPUT
V
N_
V
IN_
_______________________________________________________________________________________
C
C
V
OUT
L
L
NC
NO
IN
INCLUDES FIXTURE AND STRAY CAPACITANCE.
INCLUDES FIXTURE AND STRAY CAPACITANCE.
NO
OR NC
IN
= V
GND
N_
(
R
GND
L
R
+ R
L
ON
V+
V+
)
V+
V+
COM
COM
1Ω, Low-Voltage, Single-Supply
R
50Ω
L
R
50Ω
L
V
OUT
C
35pF
C
35pF
L
L
V
OUT
Protection diodes D1 and D2 also protect against some
overvoltage situations. With Figure 1’s circuit, if the sup-
ply voltage is below the absolute maximum rating, and
if a fault voltage up to the absolute maximum rating is
applied to an analog signal pin, no damage will result.
SPDT Analog Switches
OUTPUT
SWITCH
LOGIC
INPUT
Test Circuits/Timing Diagrams
LOGIC
INPUT
V
OUT
V
V
INH
INL
0V
V
V
INH
INL
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
V
50%
t
50%
OUT
ON
0.9 · V
t
D
0UT
t
OFF
0.9 · V
t r < 5ns
t f < 5ns
0.9 · V
OUT
OUT
7

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