ST72C334J2B6 STMicroelectronics, ST72C334J2B6 Datasheet - Page 69

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ST72C334J2B6

Manufacturer Part Number
ST72C334J2B6
Description
8-bit Microcontrollers - MCU Flash 8K SPI/SCI
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72C334J2B6

Product Category
8-bit Microcontrollers - MCU
Core
ST7
Data Bus Width
8 bit
Maximum Clock Frequency
8 MHz
Program Memory Size
8 KB
Data Ram Size
384 B
On-chip Adc
Yes
Operating Supply Voltage
3.2 V to 5.5 V
Package / Case
SDIP-42
Mounting Style
Through Hole
A/d Bit Size
8 bit
A/d Channels Available
8
Data Rom Size
256 B
Interface Type
SCI, SPI
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
32
Number Of Timers
4 bit
Program Memory Type
Flash
Factory Pack Quantity
13
Supply Voltage - Max
5 V
Supply Voltage - Min
3.2 V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST72C334J2B6
Manufacturer:
ST
Quantity:
507
16-BIT TIMER (Cont’d)
STATUS REGISTER (SR)
Read Only
Reset Value: 0000 0000 (00h)
The three least significant bits are not used.
Bit 7 = ICF1 Input Capture Flag 1.
0: No input capture (reset value).
1: An input capture has occurred on the ICAP1 pin
Bit 6 = OCF1 Output Compare Flag 1.
0: No match (reset value).
1: The content of the free running counter matches
Bit 5 = TOF Timer Overflow Flag.
0: No timer overflow (reset value).
1: The free running counter has rolled over from
Note: Reading or writing the ACLR register does
not clear TOF.
Bit 4 = ICF2 Input Capture Flag 2.
0: No input capture (reset value).
1: An input capture has occurred on the ICAP2
Bit 3 = OCF2 Output Compare Flag 2.
0: No match (reset value).
1: The content of the free running counter matches
Bit 2-0 = Reserved, forced by hardware to 0.
ICF1
or the counter has reached the OC2R value in
PWM mode. To clear this bit, first read the SR
register, then read or write the low byte of the
IC1R (IC1LR) register.
the content of the OC1R register. To clear this
bit, first read the SR register, then read or write
the low byte of the OC1R (OC1LR) register.
FFFFh to 0000h. To clear this bit, first read the
SR register, then read or write the low byte of
the CR (CLR) register.
pin. To clear this bit, first read the SR register,
then read or write the low byte of the IC2R
(IC2LR) register.
the content of the OC2R register. To clear this
bit, first read the SR register, then read or write
the low byte of the OC2R (OC2LR) register.
7
OCF1
TOF
ICF2
OCF2
0
0
0
0
INPUT CAPTURE 1 HIGH REGISTER (IC1HR)
Read Only
Reset Value: Undefined
This is an 8-bit read only register that contains the
high part of the counter value (transferred by the
input capture 1 event).
INPUT CAPTURE 1 LOW REGISTER (IC1LR)
Read Only
Reset Value: Undefined
This is an 8-bit read only register that contains the
low part of the counter value (transferred by the in-
put capture 1 event).
OUTPUT
(OC1HR)
Read/Write
Reset Value: 1000 0000 (80h)
This is an 8-bit register that contains the high part
of the value to be compared to the CHR register.
OUTPUT
(OC1LR)
Read/Write
Reset Value: 0000 0000 (00h)
This is an 8-bit register that contains the low part of
the value to be compared to the CLR register.
MSB
MSB
MSB
MSB
7
7
7
7
ST72334J/N, ST72314J/N, ST72124J
COMPARE
COMPARE
1
1
HIGH
LOW
REGISTER
REGISTER
69/153
LSB
LSB
LSB
LSB
0
0
0
0

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