CAT25160LI-G ON Semiconductor, CAT25160LI-G Datasheet - Page 9

• Manufacturer Part Number: CAT25160LI-G
• Description: IC EEPROM 16KBIT 10MHZ 8DIP
• Manufacturer: ON Semiconductor

Specifications of CAT25160LI-G

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 16K (2K x 8)
• Speed: 10MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• Density: 16Kb
• Interface Type: Serial (SPI)
• Organization: 2Kx8
• Access Time (max): 40ns
• Frequency (max): 10MHz
• Write Protection: Yes
• Data Retention: 100Year
• Operating Supply Voltage (typ): 2.5/3.3/5V
• Operating Temp Range: -40C to 85C
• Supply Current: 2mA
• Operating Supply Voltage (min): 1.8V
• Operating Supply Voltage (max): 5.5V
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 8
• Maximum Clock Frequency: 10 MHz
• Access Time: 40 ns
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.8 V
• Maximum Operating Current: 2 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 1.8 V, 5.5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Read from Memory Array
followed by a 16−bit address (see Table 11 for the number
of significant address bits).
will respond by shifting out data on the SO pin (as shown in
Figure 9). Sequentially stored data can be read out by simply
continuing to run the clock. The internal address pointer is
automatically incremented to the next higher address as data
is shifted out. After reaching the highest memory address,
the address counter “rolls over” to the lowest memory
SCK
SCK
To read from memory, the host sends a READ instruction
After receiving the last address bit, the CAT25080/160
CS
CS
SO
SO
SI
SI
Dashed Line = mode (1, 1)
* Please check the Byte Address Table (Table 11)
Dashed Line = mode (1, 1)
0
0
0
0
0
1
0
0
2
1
0
3
HIGH IMPEDANCE
OPCODE
OPCODE
0
2
0
4
0
0
HIGH IMPEDANCE
5
3
1
6
0
4
1
7
A
N
8
1
5
Figure 10. RDSR Timing
Figure 9. READ Timing
READ OPERATIONS
http://onsemi.com
9
BYTE ADDRESS*
6
0
10
1
9
7
20
address, and the read cycle can be continued indefinitely.
The read operation is terminated by taking CS high.
Read Status Register
command. After receiving the last bit of the command, the
CAT25080/160 will shift out the contents of the status
register on the SO pin (Figure 10). The status register may
be read at any time, including during an internal write cycle.
While the internal write cycle is in progress, the RDSR
command will output the RDY (Ready) bit status only (i.e.,
data out = FFh).
MSB
21
To read the status register, the host simply sends a RDSR
8
7
22 23 24 25 26 27 28 29
9
6
A
0
10
5
MSB
7
11
6
4
DATA OUT
5
12
3
DATA OUT
4
3
13
2
2
14
30
1
1
0
0