MT46H32M32LFCM-6:A TR Micron Technology Inc, MT46H32M32LFCM-6:A TR Datasheet - Page 53
![IC DDR SDRAM 1GBIT 90VFBGA](/photos/7/23/72313/mfg557-90-vfbga_sml.jpg)
MT46H32M32LFCM-6:A TR
Manufacturer Part Number
MT46H32M32LFCM-6:A TR
Description
IC DDR SDRAM 1GBIT 90VFBGA
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Specifications of MT46H32M32LFCM-6:A TR
Format - Memory
RAM
Memory Type
Mobile DDR SDRAM
Memory Size
1G (32M x 32)
Speed
166MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.95 V
Operating Temperature
0°C ~ 70°C
Package / Case
90-VFBGA
Organization
32Mx32
Density
1Gb
Address Bus
13b
Access Time (max)
6.5/5.5ns
Maximum Clock Rate
166MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
140mA
Pin Count
90
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
557-1334-2
Partial-Array Self Refresh
Output Drive Strength
PDF: 09005aef82ce3074
1gb_ddr_mobile_sdram_t48m.pdf - Rev. L 04/10 EN
For further power savings during self refresh, the partial-array self refresh (PASR) fea-
ture enables the controller to select the amount of memory to be refreshed during self
refresh. The refresh options include:
• Full array: banks 0, 1, 2, and 3
• One-half array: banks 0 and 1
• One-quarter array: bank 0
• One-eighth array: bank 0 with row address most significant bit (MSB) = 0
• One-sixteenth array: bank 0 with row address MSB = 0 and row address MSB - 1 = 0
READ and WRITE commands can still be issued to the full array during standard opera-
tion, but only the selected regions of the array will be refreshed during self refresh. Data
in regions that are not selected will be lost.
Because the device is designed for use in smaller systems that are typically point-to-
point connections, an option to control the drive strength of the output buffers is
provided. Drive strength should be selected based on the expected loading of the mem-
ory bus. The output driver settings are 25Ω, 37Ω, and 55Ω internal impedance for full,
three-quarter, and one-half drive strengths, respectively.
53
1Gb: x16, x32 Mobile LPDDR SDRAM
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Extended Mode Register
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