CY7C09369V-12AC Cypress Semiconductor Corp, CY7C09369V-12AC Datasheet
CY7C09369V-12AC
Specifications of CY7C09369V-12AC
Available stocks
Related parts for CY7C09369V-12AC
CY7C09369V-12AC Summary of contents
Page 1
... Upper and Lower Byte Controls for Bus Matching • Automatic power-down • Commercial and Industrial temperature ranges • Available in 100-pin TQFP a I/O I/O Control Control True Dual-Ported RAM Array • 3901 North First Street • CY7C09269V/79V/89V CY7C09369V/79V/89V [ 0/1 8/9 I/O ...
Page 2
... Functional Description The CY7C09269V/79V/89V and CY7C09369V/79V/89V are high-speed 3.3V synchronous CMOS 16K, 32K, and 64K x 16/18 dual-port static RAMs. Two ports are provided, permit- ting independent, simultaneous access for reads and writes to [6] any location in memory. Registers on control, address, and data lines allow for minimal set-up and hold times. In pipelined output mode, data is registered for decreased cycle time ...
Page 3
... Typical Standby Current for I (mA) (Both SB1 Ports TTL Level) Typical Standby Current 10 A for (Both Ports SB3 CMOS Level) Notes: 10. This pin is NC for CY7C09369V. 11. This pin is NC for CY7C09369V and CY7C09379V. Document #: 38-06056 Rev. ** 100-Pin TQFP (Top View CY7C09389V (64K x 18) ...
Page 4
... For read operations both Output Current into Outputs (LOW)............................. 20 mA Static Discharge Voltage ........................................... >1100V Latch-Up Current...................................................... >200mA Operating Range Range Commercial +0.5V CC Industrial +0.5V CC CY7C09269V/79V/89V CY7C09369V/79V/89V AND CE must be asserted MAX –I/O ). 8/9L 15/17L Ambient Temperature +70 C 3.3V 300 mV – ...
Page 5
... R Indust. Com’l. 10 250 CE L Indust. Com’l. 105 135 R Indust. Description Test Conditions MHz 3.3V CC and CY7C09269V/79V/89V CY7C09369V/79V/89V CY7C09269V/79V/89V CY7C09369V/79V/89V [ 2.4 2.4 0.4 0.4 2.0 2.0 0.8 0.8 10 –10 10 –10 155 275 135 230 275 390 185 300 120 ...
Page 6
... Note: 13. Test Conditions pF. Document #: 38-06056 Rev 250 TH OUTPUT (b) Thévenin Equivalent (Load 1) [13] 3.0V GND = 1. Capacitance (pF) (b) Load Derating Curve CY7C09269V/79V/89V CY7C09369V/79V/89V OUTPUT 1.4V TH (c) Three-State Delay (Load 2) (Used for CKLZ including scope and jig) ALL INPUT PULSES 90% 90% 10% 10 ...
Page 7
... Port to Port Delays t Write Port Clock HIGH to Read Data Delay CWDD t Clock to Clock Set-Up Time CCS Notes: 14. Test conditions used are Load 2. 15. This parameter is guaranteed by design, but it is not production tested. Document #: 38-06056 Rev. ** CY7C09269V/79V/89V CY7C09369V/79V/89V CY7C09269V/79V/89V CY7C09369V/79V/89V [ 100 ...
Page 8
... DC CD1 CYC2 t CL2 A A n+1 t CD2 Q t CKLZ = following the next rising edge of the clock constantly loads the address on the rising edge of the CLK. Numbers are for reference only. IL CY7C09269V/79V/89V CY7C09369V/79V/89V n+2 n+3 t CKHZ Q Q n+1 n OHZ OLZ n+2 n+3 t ...
Page 9
... Document #: 38-06056 Rev. ** CL2 CD2 HC CD2 MATCH CD1 CWDD , R/W, CNTEN, and CNTRST = for the Left Port, which is being written to. IH CY7C09269V/79V/89V CY7C09369V/79V/89V CD2 CKHZ CKLZ CD2 CKHZ CKLZ NO NO MATCH t CD1 VALID >maximum specified, then data is not valid CWDD CCS CKHZ CD2 D ...
Page 10
... During “No Operation”, data in memory at the selected address may be corrupted and should be rewritten to ensure data integrity. Document #: 38-06056 Rev n+1 n CD2 CKHZ Q n READ NO OPERATION [ n+1 n+2 n n+2 n+3 t CD2 OHZ READ WRITE . IH CY7C09269V/79V/89V CY7C09369V/79V/89V A A n+3 n CKLZ WRITE READ A A n+4 n CKLZ CD2 READ Page CD2 Q n+3 Q n+4 ...
Page 11
... DATA IN t CD1 DATA OUT OE Document #: 38-06056 Rev n+1 n CD1 CKHZ NO READ OPERATION [ n OHZ READ CY7C09269V/79V/89V CY7C09369V/79V/89V n+2 n n+2 t CD1 Q n CKLZ DC WRITE READ A A n+3 n CD1 CKLZ DC WRITE READ A n+4 t CD1 A n+5 t CD1 n+4 Page ...
Page 12
... R/W and CNTRST = Document #: 38-06056 Rev SAD t SCN t CD2 READ WITH COUNTER [ n+1 READ WITH COUNTER . IH CY7C09269V/79V/89V CY7C09369V/79V/89V t HAD t HCN Q n+1 n+2 COUNTER HOLD READ WITH COUNTER t t SAD HAD t t SCN HCN Q Q n+2 n+3 COUNTER HOLD Q n+3 READ WITH COUNTER Page ...
Page 13
... The “Internal Address” is equal to the “External Address” when ADS = V Document #: 38-06056 Rev n n+1 n+1 WRITE WITH WRITE COUNTER COUNTER HOLD . IH and equals the counter output when ADS = V IL CY7C09269V/79V/89V CY7C09369V/79V/89V [ n+2 n n+2 n+3 n+4 WRITE WITH COUNTER . IH A n+4 Page ...
Page 14
... HRST CNTRST t SD DATA IN DATA OUT COUNTER RESET Notes: 32 UB, and 33. No dead cycle exists during counter reset. A READ or WRITE cycle may be coincidental with the counter reset. Document #: 38-06056 Rev WRITE READ ADDRESS 0 ADDRESS 0 CY7C09269V/79V/89V CY7C09369V/79V/89V n READ READ ADDRESS 1 ADDRESS n Page n ...
Page 15
... CNTRST I/O Mode Reset out( out( out( Increment out(n+ CY7C09269V/79V/89V CY7C09369V/79V/89V Operation 17 [37] Deselected [37] Deselected Write IN [35] Read Outputs Disabled Operation Counter Reset to Address 0 Load Address Load into Counter Hold External Address Blocked—Counter Disabled Counter Enabled—Internal Address Generation Page ...
Page 16
... Synchronous Dual-Port SRAM Speed (ns) Ordering Code [1, 2] 6.5 CY7C09369V-6AC [2] 7.5 CY7C09369V-7AC [2] 7.5 CY7C09369V-7AI 9 CY7C09369V-9AC CY7C09369V-9AI 12 CY7C09369V-12AC 32K x18 3.3V Synchronous Dual-Port SRAM Speed (ns) Ordering Code [1, 2] 6.5 CY7C09379V-6AC [2] 7.5 CY7C09379V-7AC 9 CY7C09379V-9AC CY7C09379V-9AI 12 CY7C09379V-12AC Document #: 38-06056 Rev. ** Package Name ...
Page 17
... Package Type A100 100-Pin Thin Quad Flat Pack A100 100-Pin Thin Quad Flat Pack A100 100-Pin Thin Quad Flat Pack A100 100-Pin Thin Quad Flat Pack A100 100-Pin Thin Quad Flat Pack CY7C09269V/79V/89V CY7C09369V/79V/89V Operating Range Commercial Commercial Commercial Industrial Commercial Page ...
Page 18
... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. CY7C09269V/79V/89V CY7C09369V/79V/89V 51-85048-B Page ...
Page 19
... Document Title: CY7C09269V/79V/89V CY7C09369V/79V/89V 3.3V 16K/32K/64K X 16/18 Synchronous Dual Port Static RAM Document Number: 38-06056 Issue REV. ECN NO. Date ** 110215 12/18/01 Document #: 38-06056 Rev. ** Orig. of Change SZV Change from Spec number: 38-00668 to 38-06056 CY7C09269V/79V/89V CY7C09369V/79V/89V Description of Change Page ...