ZLF645E0Q2032G Maxim Integrated, ZLF645E0Q2032G Datasheet - Page 166

• Manufacturer Part Number: ZLF645E0Q2032G
• Description: 8-bit Microcontrollers - MCU Crimzon Flash Infrared MCU
• Manufacturer: Maxim Integrated

Specifications of ZLF645E0Q2032G

• Core: Z8
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 8 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 1 KB
• On-chip Adc: No
• Operating Supply Voltage: 2 V to 3.6 V
• Package / Case: QFN-EP-20
• Mounting Style: SMD/SMT
• Interface Type: UART
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Number Of Programmable I/os: 5
• Number Of Timers: 2 x 8 bit, 1 x 16 bit
• On-chip Dac: No
• Processor Series: ZLF645
• Program Memory Type: Flash
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2 V

Table 74. Symbolic Notation for Operands (Continued)
19-4572; Rev 0; 4/09
Symbol
RR1
RR2
Ir1
Ir2
Irr1
Irr2
IR1
IR2
IRR1
X(r1)
X(r2)
Assembly
Operand
%
@R n
@RR n
@%
@%
%
aa
aa
aa
aa
(R n )
Description
Register Pair (8-bit Address)
RR1 or RR2 represents the 8-bit address of a register pair. For addresses 
00h–DFh or F0h–FFh , the equivalent 12-bit address is {RP[3:0], %
For addresses E0h–EFh (escaped mode), the equivalent 12-bit address is 
{RP[3:0], RP[7:4], %
Indirect Working Register
Ir1 or Ir2 represents the name a working register, R n, where n = 0, 1, 2,..., 15.
@ indicates Indirect Working register addressing using an 8-bit effective
address contained in the specified working register. The accessed register’s
equivalent 12-bit address is {RP[3:0], 8-bit effective address }.
Indirect Working Register Pair
Irr1 or Irr2 represents the name of a working register pair, RRn, where n = 0, 2,
4,..., 14.
@ indicates Indirect Working register addressing using an effective address in
the specified working register pair. Depending on th e instruction, the effective
address is in the register file (12-bit address) or Program/Constant Memory 
(16-bit address).
Indirect Register
IR1 or IR2 represents the 8-bit address of a register.
@ indicates Indirect register addressing using an 8-bit effective address
contained in the specified r egister. The accessed register’s equivalent 12-bit
address is {RP[3:0], 8-bit effective address }.
Indirect Register Pair
IRR1 represents the 8-bit address of a register.
@ indicates Indirect register addressing with a 16-bit effective address (in
Program Memory) contained in the specified register pair.
Indexed (X) Addressing
X represents the 8-bit base address to which the offset is added.
r1 or r2 represents the name, R
signed offset. The 8-bit effective address is the sum of X and the contents of
working register R
{RP[3:0],
8-bit effective address
n
. The accessed register’s equivalent 12-bit address is 
aa
[3:0]}.
}.
n
, of a working r egister containing the 8-bit
ZLF645 Series Flash MCUs
Product Specification
Addressing Notation
aa
}. 
158