EV-ADF4360-3EB1Z Analog Devices, EV-ADF4360-3EB1Z Datasheet - Page 3

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EV-ADF4360-3EB1Z

Manufacturer Part Number
EV-ADF4360-3EB1Z
Description
Clock & Timer Development Tools Evaluation Board I.C.
Manufacturer
Analog Devices
Type
PLL Synthesizers / Multipliers / Dividersr
Datasheet

Specifications of EV-ADF4360-3EB1Z

Rohs
yes
Product
Evaluation Boards
Tool Is For Evaluation Of
ADF4360-3
Frequency
250 MHz, 1.95 GHz
Operating Supply Voltage
9 V
Interface Type
USB
Operating Supply Current
50 mA
Factory Pack Quantity
1
Evaluation Board User Guide
EVALUATION BOARD HARDWARE
The evaluation board comes with a cable to connect it to the
USB port of a PC. The silkscreen and cable diagram for the
evaluation board are shown in Figure 2. The board schematics
are shown in Figure 9 through Figure 11.
The board is powered from a single 9 V battery, or from the
USB supply, by changing the position of Switch SW1. All com-
ponents necessary for LO generation are catered for on-board.
A 10 MHz TCXO from Fox Electronics provides the necessary
reference input. Otherwise, an external reference signal can be
connected via J3. The PLL comprises the ADF4360-0BCPZ and
a passive loop filter. The VCO output from RF
through the standard SMA Connector J1 and the complemen-
tary RF
OUT
B VCO output is available from J2.
Figure 2. Evaluation Board Silkscreen—Top View
OUT
A is available
Rev. B | Page 3 of 12
Users may provide their own power supplies using the J4 and J5
connectors, as shown in Figure 2. Hardware power-down using
the CE pin can be controlled by inserting an SMA connector
into J6 and removing R12.
The on-board filter is a third-order, passive, low-pass filter. The
filter contains three capacitors (C13, C14, and C15) plus two
resistors (R10 and R11). The footprint for R10 is located on the
underside of the board. The design parameters for the loop
filter are for a center frequency of 2500 MHz, a PFD frequency
of 200 kHz, and a low-pass filter bandwidth of 10 kHz. To design a
filter for different frequency setups, use the
software.
RF OUTPUT STAGES
The output stage of the board contains a tuned load for the
particular frequency of operation. The particular network inserted
in the board is optimized for 2500 MHz operation. This consists
of a 4.7 nH shunt inductor, a 10 pF series capacitor, and a 0 Ω
resistor. If in doubt, use a 50 Ω resistor instead of the shunt
inductor, a 100 pF bypass capacitor, and a series 0 Ω resistor.
It is important that the same components be placed on the
RF
outputs be terminated with 50 Ω loads. Otherwise, the output
power is not optimum, and in some cases, the part may
malfunction.
OUT
A and RF
OUT
B lines. In addition, it is essential that both
ADIsimPLL
UG-095
simulation

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