EVAL-AD5259DBZ Analog Devices, EVAL-AD5259DBZ Datasheet - Page 18

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EVAL-AD5259DBZ

Manufacturer Part Number
EVAL-AD5259DBZ
Description
Digital Potentiometer Development Tools EVALUATION BOARD I.C.
Manufacturer
Analog Devices
Series
AD5259r
Datasheet

Specifications of EVAL-AD5259DBZ

Rohs
yes
Product
Evaluation Boards
Tool Is For Evaluation Of
AD5259
Resistance
5 kOhms/10 kOhms/50 kOhms/100 kOhms
Operating Supply Voltage
5 V
Description/function
Nonvolatile, I2C compatible 256-position, digital potentiometer
Interface Type
I2C
Maximum Operating Temperature
+ 85 C
Factory Pack Quantity
1
For Use With
Sim DAC Web Tool
AD5259
TOLERANCE READBACK MODES
Table 15. Traditional Readback of Tolerance (Individually)
S
S
Table 16.Traditional Readback of Tolerance (Consecutively)
S
Calculating R
The AD5259 features a patented R
nonvolatile memory. The tolerance is stored in the memory
during factory production and can be read by users at any time.
The knowledge of stored tolerance allows users to accurately
calculate R
mode, and open-loop applications where knowledge of abso-
lute resistance is critical.
The stored tolerance resides in the read-only memory and is
expressed as a percentage. The tolerance is stored in two memory
location bytes in sign magnitude binary form (see Figure 41).
The two EEPROM address bytes are 11110 (sign + integer)
and 11111 (decimal number). The two bytes can be indi-
vidually accessed with two separate commands (see Table 15).
Alternatively, readback of the first byte followed by the second
byte can be done in one command (see Table 16). In the latter
case, the memory pointer will automatically increment from
the first to the second EEPROM location (increments from
11110 to 11111) if read consecutively.
7-Bit Device
Address
(See Table 5)
Slave Address
Byte
7-Bit Device Address
(See Table 5)
Slave Address Byte
7-Bit Device Address
(See Table 5)
Slave Address Byte
AB
. This feature is valuable for precision, rheostat
AB
Tolerance Stored in Read-Only Memory
0 SA 0 0 1 1 1 1 1 0 SA S
A
SIGN
SIGN
D7
Instruction Byte
D6
2
6
0 SA 0 0 1 1 1 1 1 0 SA S
Figure 41. Format of Stored Tolerance in Sign Magnitude Format with Bit Position Descriptions.
0 SA 0 0 1 1 1 1 1 1 SA S
D5
7 BITS FOR INTEGER NUMBER
2
AB
5
Instruction Byte
Instruction Byte
tolerance storage in the
D4
2
4
Repeat start
D3
2
3
7-Bit Device
Address
(See Table 5)
Slave Address
Byte
D2
2
(Unit is Percent. Only Data Bytes are Shown.)
2
D1
2
1
Repeat start
Repeat start
D0
2
Rev. C | Page 18 of 24
0
7-Bit Device Address
(See Table 5)
Slave Address Byte
7-Bit Device Address
(See Table 5)
Slave Address Byte
A
1 SA D7 D6 D5 D4 D3 D2 D1 D0 MA D7 D6 D5 D4 D3 D2 D1 D0 NA P
Sign + Integer Byte
In the first memory location, the MSB is designated for the
sign (0 = + and 1= −) and the seven LSBs are designated for
the integer portion of the tolerance. In the second memory
location, all eight data bits are designated for the decimal
portion of tolerance. Note the decimal portion has a limited
accuracy of only 0.1%. For example, if the rated R
and the data readback from Address 11110 shows 0001 1100,
and Address 11111 shows 0000 1111, then the tolerance can
be calculated as
2
D7
–1
MSB: 0 = +
Next 7 MSB: 001 1100 = 28
8 LSB: 0000 1111 = 15 × 2
Tolerance = +28.06%
Rounded Tolerance = +28.1% and therefore,
R
AB_ACTUAL
2
D6
–2
8 BITS FOR DECIMAL NUMBER
2
D5
–3
= 12.810 kΩ
2
D4
1 SA D7 D6 D5 D4 D3 D2 D1 D0 NA P
–4
1 SA D7 D6 D5 D4 D3 D2 D1 D0 NA P
2
D3
–5
Sign + Integer Byte
Decimal Byte
2
D2
–6
–8
= 0.06
Decimal Byte
2
D1
–7
2
D0
–8
A
Data Sheet
AB
= 10 kΩ

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