EVAL-ADXL344Z Analog Devices, EVAL-ADXL344Z Datasheet - Page 16

• Manufacturer Part Number: EVAL-ADXL344Z
• Description: Daughter Cards & OEM Boards EB
• Manufacturer: Analog Devices
• Series: ADXL344r

Specifications of EVAL-ADXL344Z

• Rohs: yes
• Product: Breakout Boards
• Description/function: 3 axis accelerometer evaluation board
• Interface Type: I2C, SPI
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 1.7 V to 2.75 V
• Factory Pack Quantity: 1
• For Use With: ADXL344

ADXL344
Table 12. I
Parameter
f
t
t
t
t
t
t
t
t
t
t
t
C
1
2
3
4
5
6
SCL
1
2
3
4
5
6
7
8
9
10
11
the falling edge of SCL.
The maximum value for t
Limits are based on characterization results, with f
All values referred to the V
t
A transmitting device must internally provide an output hold time of at least 300 ns for the SDA signal (with respect to V
The maximum t
B
3, 4, 5, 6
6
SDA
SCL
is the data hold time that is measured from the falling edge of SCL. It applies to data in transmission and acknowledge.
2
C Timing (T
6
value must be met only if the device does not stretch the low period (t
t
9
6
CONDITION
is a function of the clock low time (t
IH
START
and the V
A
t
Min
2.5
0.6
1.3
0.6
100
0
0.6
0.6
1.3
0
4
= 25°C, V
IL
t
levels given in Table 11.
3
Limit
S
= 2.6 V, V
Max
400
0.9
300
300
250
400
1, 2
SCL
t
10
= 400 kHz and a 3 mA sink current; not production tested.
t
6
DD I/O
3
), the clock rise time (t
= 1.8 V)
Unit
kHz
µs
µs
µs
µs
ns
µs
µs
µs
µs
ns
ns
ns
ns
pF
Figure 30. I
t
2
Rev. 0 | Page 16 of 40
2
10
C Timing Diagram
t
), and the minimum data setup time (t
11
Description
SCL clock frequency
SCL cycle time
t
t
t
t
t
t
t
t
t
t
t
t
Capacitive load for each bus line
HIGH
LOW
HD, STA
SU, DAT
HD, DAT
SU, STA
SU, STO
BUF
R
R
F
F
, fall time of SDA when receiving
, fall time of both SCL and SDA when transmitting
, rise time of both SCL and SDA when receiving
, rise time of both SCL and SDA when receiving or transmitting
t
, bus-free time between a stop condition and a start condition
5
, SCL low time
, SCL high time
, setup time for repeated start
3
, start/repeated start condition hold time
, data setup time
, stop condition setup time
, data hold time
) of the SCL signal.
CONDITION
REPEATED
START
t
7
IH,min
t
4
5(min)
of the SCL signal) to bridge the undefined region of
). This value is calculated as t
t
1
Data Sheet
6(max)
CONDITION
= t
STOP
t
3
8
− t
10
− t
5(min)
.