EVAL-ADXL350Z-S Analog Devices, EVAL-ADXL350Z-S Datasheet - Page 25

• Manufacturer Part Number: EVAL-ADXL350Z-S
• Description: Daughter Cards & OEM Boards EB
• Manufacturer: Analog Devices
• Series: ADXL350r

Specifications of EVAL-ADXL350Z-S

• Rohs: yes
• Product: Satellite Boards
• Description/function: 3 axis accelerometer evaluation board
• Interface Type: I2C, SPI
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 2 V to 3.6 V
• Factory Pack Quantity: 1
• For Use With: ADXL350

Data Sheet
result in undesirable behavior if the free-fall interrupt is enabled.
Values between 300 mg and 600 mg (0x0A to 0x13) are
recommended.
Register 0x29—TIME_FF (Read/Write)
The TIME_FF register is eight bits and stores an unsigned time
value representing the minimum time that the RSS value of all axes
must be less than THRESH_FF to generate a free-fall interrupt.
The scale factor is 5 ms/LSB. A value of 0 may result in undesirable
behavior if the free-fall interrupt is enabled. Values between 100 ms
and 350 ms (0x14 to 0x46) are recommended.
Register 0x2A—TAP_AXES (Read/Write)
D7
0
Suppress Bit
Setting the suppress bit suppresses double tap detection if
acceleration greater than the value in THRESH_TAP is present
between taps. See the Tap Detection section for more details.
TAP_x Enable Bits
A setting of 1 in the TAP_X enable, TAP_Y enable, or TAP_Z
enable bit enables x-, y-, or z-axis participation in tap detection.
A setting of 0 excludes the selected axis from participation in
tap detection.
Register 0x2B—ACT_TAP_STATUS (Read Only)
D7
0
ACT_x Source and TAP_x Source Bits
These bits indicate the first axis involved in a tap or activity
event. A setting of 1 corresponds to involvement in the event,
and a setting of 0 corresponds to no involvement. When new
data is available, these bits are not cleared but are overwritten by
the new data. The ACT_TAP_STATUS register should be read
before clearing the interrupt. Disabling an axis from participation
clears the corresponding source bit when the next activity or
tap/double tap event occurs.
Asleep Bit
A setting of 1 in the asleep bit indicates that the part is asleep,
and a setting of 0 indicates that the part is not asleep. See the
Register 0x2D—POWER_CTL (Read/Write) section for more
information on autosleep mode.
Register 0x2C—BW_RATE (Read/Write)
D7
0
LOW_POWER Bit
A setting of 0 in the LOW_POWER bit selects normal operation,
and a setting of 1 selects reduced power operation, which has
somewhat higher noise (see the Power Modes section for details).
D6
ACT_X
source
D6
0
D6
0
D5
0
D5
0
D5
ACT_Y
source
D4
0
D4
LOW_POWER
D4
ACT_Z
source
D3
Suppress
D3
Asleep
D2
TAP_X
enable
D3
D2
TAP_X
source
D2
D1
TAP_Y
enable
D1
TAP_Y
source
Rate
D1
D0
TAP_Z
enable
D0
TAP_Z
source
D0
Rev. 0 | Page 25 of 36
Rate Bits
These bits select the device bandwidth and output data rate (see
Table 7 and Table 8 for details). The default value is 0x0A, which
translates to a 100 Hz output data rate. An output data rate
should be selected that is appropriate for the communication
protocol and frequency selected. Selecting too high of an output
data rate with a low communication speed results in samples
being discarded.
Register 0x2D—POWER_CTL (Read/Write)
D7
0
Link Bit
A setting of 1 in the link bit with both the activity and inactivity
functions enabled delays the start of the activity function until
inactivity is detected. After activity is detected, inactivity detection
begins, preventing the detection of activity. This bit serially links
the activity and inactivity functions. When this bit is set to 0,
the inactivity and activity functions are concurrent. Additional
information can be found in the Link Mode section.
When clearing the link bit, it is recommended that the part be
placed into standby mode and then set back to measurement
mode with a subsequent write. This is done to ensure that the
device is properly biased if sleep mode is manually disabled;
otherwise, the first few samples of data after the link bit is cleared
may have additional noise, especially if the device was asleep
when the bit was cleared.
AUTO_SLEEP Bit
If the link bit is set, a setting of 1 in the AUTO_SLEEP bit sets
the
(that is, when acceleration has been below the THRESH_INACT
value for at least the time indicated by TIME_INACT). A setting
of 0 disables automatic switching to sleep mode. See the description
of the sleep bit in this section for more information.
When clearing the AUTO_SLEEP bit, it is recommended that the
part be placed into standby mode and then set back to measure-
ment mode with a subsequent write. This is done to ensure that
the device is properly biased if sleep mode is manually disabled;
otherwise, the first few samples of data after the AUTO_SLEEP
bit is cleared may have additional noise, especially if the device
was asleep when the bit was cleared.
Measure Bit
A setting of 0 in the measure bit places the part into standby mode,
and a setting of 1 places the part into measurement mode. The
ADXL350
consumption.
Sleep Bit
A setting of 0 in the sleep bit puts the part into the normal mode
of operation, and a setting of 1 places the part into sleep mode.
Sleep mode suppresses DATA_READY, stops transmission of data
ADXL350
D6
0
powers up in standby mode with minimum power
D5
Link
to switch to sleep mode when inactivity is detected
D4
AUTO_SLEEP
D3
Measure
D2
Sleep
ADXL350
D1
Wakeup
D0